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LTM9008IY-14#PBF
Integrated Circuits (ICs)

LTM9008IY-14#PBF

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Analog Devices Inc./Maxim Integrated

14-BIT, 65MSPS LOW POWER OCTAL ADCS

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LTM9008IY-14#PBF
Integrated Circuits (ICs)

LTM9008IY-14#PBF

Active
Analog Devices Inc./Maxim Integrated

14-BIT, 65MSPS LOW POWER OCTAL ADCS

Technical Specifications

Parameters and characteristics for this part

SpecificationLTM9008IY-14#PBF
ArchitecturePipelined
ConfigurationS/H-ADC
Data InterfaceLVDS - Serial
FeaturesSimultaneous Sampling
Input TypeDifferential
Mounting TypeSurface Mount
Number of A/D Converters8
Number of Bits14
Number of Inputs [custom]8
Operating Temperature [Max]85 °C
Operating Temperature [Min]-40 C
Package / Case140-BFBGA
Ratio - S/H:ADC1:1
Reference TypeInternal, External
Sampling Rate (Per Second)65 M
Supplier Device Package140-BGA
Supplier Device Package [x]11.25
Supplier Device Package [y]9
Voltage - Supply, Analog [Max]1.9 V
Voltage - Supply, Analog [Min]1.7 V
Voltage - Supply, Digital [Max] [custom]1.9 V
Voltage - Supply, Digital [Min] [custom]1.7 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyN/A 72$ 118.33

Description

General part information

LTM9008-14 Series

The LTM9008-14/LTM9007-14/LTM9006-14 are 8-channel, simultaneous sampling 14-bit A/D converters designed for digitizing high frequency, wide dynamic range signals. AC performance includes 73dB SNR and 90dB spurious free dynamic range (SFDR). Low power consumption per channel reduces heat in high channel count applications. Integrated bypass capacitance and flowthrough pinout reduces overall board space requirements.DC specs include ±1LSB INL (typ), ±0.3LSB DNL (typ) and no missing codes over temperature. The transition noise is a low 1.2LSBRMS.The digital outputs are serial LVDS to minimize the number of data lines. Each channel outputs two bits at a time (2-lane mode). At lower sampling rates there is a one bit per channel option (1-lane mode).The ENC+and ENC–inputs may be driven differentially or single-ended with a sine wave, PECL, LVDS, TTL, or CMOS inputs. An internal clock duty cycle stabilizer allows high performance at full speed for a wide range of clock duty cycles.ApplicationsCommunicationsCellular Base StationsSoftware Defined RadiosPortable Medical ImagingMultichannel Data AcquisitionNondestructive Testing