
CY62167EV18LL-55BVXI
ActiveSRAM, ASYNCHRONOUS SRAM, 16 MBIT, 1M X 16BIT, VFBGA, 48 PINS, 1.65 V
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CY62167EV18LL-55BVXI
ActiveSRAM, ASYNCHRONOUS SRAM, 16 MBIT, 1M X 16BIT, VFBGA, 48 PINS, 1.65 V
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Technical Specifications
Parameters and characteristics for this part
| Specification | CY62167EV18LL-55BVXI |
|---|---|
| Access Time | 55 ns |
| Memory Format | SRAM |
| Memory Interface | Parallel |
| Memory Organization | 1 M |
| Memory Size | 2 MB |
| Memory Type | Volatile |
| Mounting Type | Surface Mount |
| Operating Temperature [Max] | 85 C |
| Operating Temperature [Min] | -40 ¯C |
| Package / Case | 48-VFBGA |
| Supplier Device Package | 48-VFBGA (6x8) |
| Technology | SRAM - Asynchronous |
| Voltage - Supply [Max] | 2.25 V |
| Voltage - Supply [Min] | 1.65 V |
| Write Cycle Time - Word, Page | 55 ns |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
Description
General part information
CY62167EV18LL Series
CY62167EV18LL-55BVXI is a high-performance CMOS static RAM organized as 1M words by 16 bits. This device features an advanced circuit design to provide ultra-low active current. This is ideal for providing More Battery Life (MoBL®) in portable applications such as cellular telephones. This device also has an automatic power-down feature that reduces power consumption by 99 percent when addresses are not toggling. Place the device into standby mode when deselected (active-low CE1 HIGH or CE2 LOW or both active-low BHE and active-low BLE are HIGH). The input and output pins (I/O0 through I/O15) are placed in a high impedance state when: the device is deselected (active-low CE1 HIGH or CE2 LOW); outputs are disabled (active-low OE HIGH); both Byte High Enable and Byte Low Enable are disabled (active-low BHE, active-low BLE HIGH); and a write operation is in progress (active-low CE1 LOW, CE2 HIGH and active-low WE LOW).
Documents
Technical documentation and resources