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Technical Specifications
Parameters and characteristics for this part
| Specification | 74HC4040D-Q100J |
|---|---|
| Count Rate | 98 MHz |
| Direction | Up |
| Grade | Automotive |
| Logic Type | Binary Counter |
| Mounting Type | Surface Mount |
| Number of Bits per Element | 12 |
| Number of Elements | 1 |
| Operating Temperature [Max] | 125 °C |
| Operating Temperature [Min] | -40 C |
| Package / Case | 16-SOIC |
| Package / Case | 0.154 in, 3.9 mm |
| Qualification | AEC-Q100 |
| Reset | Asynchronous |
| Supplier Device Package | 16-SO |
| Trigger Type | Negative Edge |
| Voltage - Supply [Max] | 6 V |
| Voltage - Supply [Min] | 2 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | N/A | 2273 | $ 0.65 | |
Description
General part information
74HC4040D-Q100 Series
The 74HC4040-Q100; 74HCT4040-Q100 is a 12-stage binary ripple counter with a clock input (CP), an overriding asynchronous master reset input (MR) and twelve parallel outputs (Q0 to Q11). The counter advances on the HIGH-to-LOW transition ofCP. A HIGH on MR clears all counter stages and forces all outputs LOW, independent of the state ofCP. Each counter stage is a static toggle flip-flop. Inputs include clamp diodes that enable the use of current limiting resistors to interface inputs to voltages in excess of VCC.
Documents
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