
AD5384BBC-5
ObsoleteIC DAC 14BIT V-OUT 100CSBGA
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AD5384BBC-5
ObsoleteIC DAC 14BIT V-OUT 100CSBGA
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Technical Specifications
Parameters and characteristics for this part
| Specification | AD5384BBC-5 |
|---|---|
| Architecture | String DAC |
| Data Interface | DSP, SPI, I2C |
| Differential Output | No |
| DNL (LSB) Maximum | 2 LSB |
| DNL (LSB) Minimum | -1 LSB |
| DNL Maximum (LSB) | 2 LSB |
| DNL Minimum (LSB) | -1 LSB |
| INL (LSB) Maximum | 4 LSB |
| INL (LSB) Minimum | -4 LSB |
| INL (Max) (LSB) Tolerance | 4 LSB |
| Mounting Type | Surface Mount |
| Number of Bits | 14 bits |
| Number of D/A Converters | 40 count |
| Operating Temperature (Max) | 85 °C |
| Operating Temperature (Min) | -40 °C |
| Output Type | Voltage - Buffered |
| Package / Case | CSPBGA, 100-LFBGA |
| Package Length | 10 mm |
| Package Name | 100-CSPBGA |
| Package Width | 10 mm |
| Reference Type | External, Internal |
| Settling Time | 8 µs |
| Voltage - Supply, Analog | 5 V |
| Voltage - Supply, Digital (Max) | 5.5 V |
| Voltage - Supply, Digital (Min) | 2.7 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | Updated |
|---|---|---|---|---|
CAD
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Description
General part information
AD5384 Series
The AD5384 is a complete single-supply, 40-channel, 14-bit digital-to-analog converter (DAC) available in a 100-ball CSP_BGA package. All 40 channels have an on-chip output amplifier with rail-to-rail operation. The AD5384 includes an internal 1.25 V/2.5 V, 10 ppm/°C reference, an on-chip channel monitor function that multiplexes the analog outputs to a common MON_OUT pin for external monitoring, and an output amplifier boost mode that allows the amplifier slew rate to be optimized. The AD5384 contains a serial interface compatible with SPI, QSPI, MICROWIRE, and DSP interface standards with interface speeds in excess of 30 MHz and an I2C-compatible interface supporting 400 kHz data transfer rate. An input register followed by a DAC register provides double buffering, allowing the DAC outputs to be updated independently or simultaneously, using theLDACinput. Each channel has a programmable gain and offset adjust register letting the user fully calibrate any DAC channel. Power consumption is typically 0.25 mA per channel with boost mode off.APPLICATIONSVariable optical attenuators (VOAs)Level settings (automatic test equipment{ATE})Optical micro-electromechanical systems (MEMS) control systemsInstrumentation
Documents
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