Specification	74AUP1G175GM,115

Clock Frequency	300 MHz
Current - Output High, Low [custom]	4 mA
Current - Output High, Low [custom]	4 mA
Current - Quiescent (Iq)	500 nA
Function	Reset
Input Capacitance	0.8 pF
Max Propagation Delay @ V, Max CL	5.7 ns
Mounting Type	Surface Mount
Number of Bits per Element	1
Number of Elements	1
Operating Temperature [Max]	125 °C
Operating Temperature [Min]	-40 °C
Output Type	Non-Inverted
Package / Case	6-XFDFN
Supplier Device Package	SOT886 (1.45x1), 6-XSON
Trigger Type	Positive Edge
Type	D-Type
Voltage - Supply [Max]	3.6 V
Voltage - Supply [Min]	0.8 V

74AUP1G175GM Series

Low-power D-type flip-flop with reset; positive-edge trigger

Part	Type	Current - Quiescent (Iq)	Trigger Type	Output Type	Input Capacitance	Function	Voltage - Supply [Min]	Voltage - Supply [Max]	Number of Bits per Element	Operating Temperature [Max]	Operating Temperature [Min]	Current - Output High, Low [custom]	Current - Output High, Low [custom]	Supplier Device Package	Clock Frequency	Mounting Type	Package / Case	Number of Elements	Max Propagation Delay @ V, Max CL
Nexperia USA Inc. 74AUP1G175GM,115	D-Type	500 nA	Positive Edge	Non-Inverted	0.8 pF	Reset	0.8 V	3.6 V	1	125 °C	-40 °C	4 mA	4 mA	6-XSON SOT886 (1.45x1)	300 MHz	Surface Mount	6-XFDFN	1	5.7 ns

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Digikey	N/A	4584	$ 0.63

Description

General part information

74AUP1G175GM Series

The 74AUP1G175 is a single positive edge triggered D-type flip-flop with individual data (D), clock (CP), master reset (MR) inputs, and Q output. The D-input that meets the set-up and hold time requirements on the LOW-to-HIGH clock transition will be stored in the flip-flop and appear at the Q output. A LOW onMRcauses the flip-flop and output to be reset to LOW. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic power consumption across the entire VCCrange from 0.8 V to 3.6 V. This device is fully specified for partial power down applications using IOFF. The IOFFcircuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.