74LVC1G74DC,125
ActiveSINGLE D-TYPE FLIP-FLOP WITH SET AND RESET; POSITIVE EDGE TRIGGER
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74LVC1G74DC,125
ActiveSINGLE D-TYPE FLIP-FLOP WITH SET AND RESET; POSITIVE EDGE TRIGGER
Deep-Dive with AI
Technical Specifications
Parameters and characteristics for this part
| Specification | 74LVC1G74DC,125 |
|---|---|
| Clock Frequency | 200 MHz |
| Current - Output High, Low | 32 mA, 32 mA |
| Current - Quiescent (Iq) | 4 çA |
| Function | Set(Preset) and Reset |
| Input Capacitance | 4 pF |
| Max Propagation Delay @ V, Max CL | 4.1 ns |
| Mounting Type | Surface Mount |
| Number of Bits per Element | 1 |
| Number of Elements | 1 |
| Operating Temperature [Max] | 125 °C |
| Operating Temperature [Min] | -40 °C |
| Output Type | Complementary |
| Package / Case | 8-VFSOP |
| Package / Case [custom] | 2.3 mm |
| Package / Case [custom] | 0.091 " |
| Supplier Device Package | 8-VSSOP |
| Trigger Type | Positive Edge |
| Type | D-Type |
| Voltage - Supply [Max] | 5.5 V |
| Voltage - Supply [Min] | 1.65 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | N/A | 0 | $ 0.49 | |
Description
General part information
74LVC1G74DC Series
The 74LVC1G74 is a single positive edge triggered D-type flip-flop with individual data (D), clock (CP), set (SD) and reset (RD) inputs, and complementary Q andQoutputs. Data at the D-input that meets the set-up and hold time requirements on the LOW-to-HIGH clock transition will be stored in the flip-flop and appear at the Q output. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments.
Documents
Technical documentation and resources