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Technical Specifications

Parameters and characteristics for this part

SpecificationAD4630-16BBCZ-RL
ArchitectureSAR
ConfigurationADC
Data InterfaceSPI
FeaturesSimultaneous Sampling
Input TypeDifferential
Mounting TypeSurface Mount
Number of A/D Converters2 count
Number of Bits16 bits
Number of Inputs2
Operating Temperature (Max)125 °C
Operating Temperature (Min)-40 °C
Package / Case64-FBGA, CSPBGA
Package Length7 mm
Package Name64-CSPBGA
Package Width7 mm
Ratio - ADC2
Ratio - S/H0
Reference TypeExternal
Sampling Rate (Per Second)2 MHz
Voltage - Supply, Analog (Range 1 Max)1.89 V
Voltage - Supply, Analog (Range 1 Min)1.71 V
Voltage - Supply, Analog (Range 2 Max)5.5 V
Voltage - Supply, Analog (Range 2 Min)5.3 V
Voltage - Supply, Digital (Range 1) Maximum1.89 V
Voltage - Supply, Digital (Range 1) Minimum1.71 V
Voltage - Supply, Digital (Range 2) Maximum5.5 V
Voltage - Supply, Digital (Range 2) Minimum5.3 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$Updated
DigikeyTape & Reel (TR) 2000$ 33.69<3d

CAD

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Description

General part information

AD4630-16 Series

The AD4630-16/AD4632-16are 2-channel, simultaneous sampling, Easy Drive™, 2 MSPS or 500 kSPS successive approximation register (SAR), analog-to-digital converters (ADCs). With a guaranteed maximum ±3 ppm integral nonlinearity (INL) and no missing codes at 16-bits, the AD4630-16/AD4632-16 achieve excellent precision from −40°C to +125°C. Figure 1 in the data sheet shows the functional architecture of the AD4630-16/AD4632-16.A low-drift, internal precision-reference buffer eases voltage-reference sharing with other system circuitry. The AD4630-16/AD4632-16 offer a typical dynamic range of 97.4 dB when using a 5 V reference. The low noise floor enables signal chains utilizing less gain and lower power. A block averaging filter with programmable decimation ratio is available and can reduce noise for low-bandwidth signals, improving accuracy. The wide differential input and common-mode ranges allow inputs to use the full voltage reference (±VREF) range without saturating, simplifying signal-conditioning requirements and system calibration. The improved settling of the Easy Drive analog inputs broadens the selection of analog front end (AFE) components compatible with the AD4630-16/AD4632-16. Both single-ended and differential signals are supported.The versatile Flexi-SPI serial-peripheral interface (SPI) eases host processor and ADC integration. A wide data-clocking window, multiple serial-data output (SDO) lanes, and optional dual data rate (DDR) data clocking can reduce the serial clock to 10 MHz while operating at a sample rate of 2 MSPS. Echo clock mode can relax the timing requirements and simplify the use of digital isolators.The ball grid array (BGA) package of the AD4630-16/AD4632-16 integrates all critical power supply and reference bypass capacitors, reducing the footprint and system-component count, and lessening sensitivity to board layout.APPLICATIONSAutomatic test equipmentDigital control loopsMedical instrumentationSeismologySemiconductor manufacturingScientific instrumentation