74AUP2G32GT,115
ActiveOR GATE, DUAL, 2 INPUT, 8 PINS, XSON, 74AUP2G32
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74AUP2G32GT,115
ActiveOR GATE, DUAL, 2 INPUT, 8 PINS, XSON, 74AUP2G32
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Technical Specifications
Parameters and characteristics for this part
| Specification | 74AUP2G32GT,115 |
|---|---|
| Current - Output High, Low [custom] | 4 mA |
| Current - Output High, Low [custom] | 4 mA |
| Current - Quiescent (Max) [Max] | 500 nA |
| Input Logic Level - High [Max] | 2 V |
| Input Logic Level - High [Min] | 1.6 V |
| Logic Type | OR Gate |
| Max Propagation Delay @ V, Max CL | 6.4 ns |
| Mounting Type | Surface Mount |
| Number of Circuits | 2 |
| Number of Inputs | 2 |
| Operating Temperature [Max] | 125 °C |
| Operating Temperature [Min] | -40 C |
| Package / Case | 8-XFDFN |
| Supplier Device Package | SOT833-1 (1.95x1), 8-XSON |
| Voltage - Supply [Max] | 3.6 V |
| Voltage - Supply [Min] | 0.8 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Bulk | 4255 | $ 0.07 | |
| N/A | 0 | $ 0.20 | ||
| 4300 | $ 0.20 | |||
Description
General part information
74AUP2G32GT Series
The 74AUP2G32 is a dual 2-input OR gate. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic power consumption across the entire VCCrange from 0.8 V to 3.6 V. This device is fully specified for partial power down applications using IOFF. The IOFFcircuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.
Documents
Technical documentation and resources