
AD5341BRUZ-REEL7
Active2.5V TO 5.5V, 115ΜA PARALLEL INTERFACE SINGLE VOLTAGE OUTPUT 12-BIT DAC
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AD5341BRUZ-REEL7
Active2.5V TO 5.5V, 115ΜA PARALLEL INTERFACE SINGLE VOLTAGE OUTPUT 12-BIT DAC
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Technical Specifications
Parameters and characteristics for this part
| Specification | AD5341BRUZ-REEL7 |
|---|---|
| Architecture | String DAC |
| Data Interface | Parallel |
| Differential Output | No |
| DNL (LSB) Tolerance | 0.2 LSB |
| INL (LSB) Tolerance | 2 LSB |
| Mounting Type | Surface Mount |
| Number of Bits | 12 bits |
| Number of D/A Converters | 1 count |
| Operating Temperature (Max) | 105 °C |
| Operating Temperature (Min) | -40 °C |
| Output Type | Voltage - Buffered |
| Package Length | 0.173 in |
| Package Name | 20-TSSOP |
| Package Width | 4.4 mm |
| Reference Type | External |
| Settling Time | 10 µs |
| Voltage - Supply, Analog (Max) | 5.5 V |
| Voltage - Supply, Analog (Min) | 2.5 V |
| Voltage - Supply, Digital (Max) | 5.5 V |
| Voltage - Supply, Digital (Min) | 2.5 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | Updated |
|---|---|---|---|---|
| Digikey | Cut Tape (CT) | 1 | $ 11.61 | <1d |
| 10 | $ 9.11 | |||
| 25 | $ 8.48 | |||
| 100 | $ 7.96 | |||
| Tape & Reel (TR) | 1000 | $ 7.10 | <1d | |
CAD
3D models and CAD resources for this part
Description
General part information
AD5341 Series
The AD5330/AD5331/AD5340/AD5341* are single 8-/10-/12-bit DACs. They operate from a 2.5 V to 5.5 V supply consuming just 115 μA at 3 V and feature a power-down mode that further reduces the current to 80 nA. The devices incorporate an on-chip output buffer that can drive the output to both supply rails, but the AD5330, AD5340, and AD5341 allow a choice of buffered or unbuffered reference input.The AD5330/AD5331/AD5340/AD5341 have a parallel interface.CSselects the device and data is loaded into the input registers on the rising edge ofWR.The GAIN pin allows the output range to be set at 0 V to VREFor 0 V to 2 × VREF.Input data to the DACs is double-buffered, allowing simultaneous update of multiple DACs in a system using theLDACpin.An asynchronousCLRinput is also provided, which resets the contents of the input register and the DAC register to all zeros. These devices also incorporate a power-on reset circuit that ensures that the DAC output powers on to 0 V and remains there until valid data is written to the device.The AD5330/AD5331/AD5340/AD5341 are available in thin shrink small outline packages (TSSOP).ApplicationsPortable battery-powered instrumentsDigital gain and offset adjustmentProgrammable voltage and current sourcesProgrammable attenuatorsIndustrial process control* Protected by U.S. Patent Number 5,969,657; other patents pending.Data Sheet, Rev. A, 2/08