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Technical Specifications

Parameters and characteristics for this part

SpecificationAD5316RBRUZ
ArchitectureString DAC
Data InterfaceI2C
Differential OutputNo
DNL (LSB) Tolerance0.5 LSB, 0.5 LSB
DNL (Max) (LSB)0.5 LSB, 0.5 LSB
INL (LSB) Tolerance0.12 LSB
INL (Max) (LSB)0.12 LSB
Mounting TypeSurface Mount
Number of Bits10 bits
Number of D/A Converters4 count
Operating Temperature (Max)105 °C
Operating Temperature (Min)-40 °C
Output TypeVoltage - Buffered
Package Length0.173 in
Package Name16-TSSOP
Package Width4.4 mm
Reference TypeExternal, Internal
Settling Time7 µs
Voltage - Supply, Analog (Max)5.5 V
Voltage - Supply, Analog (Min)2.7 V
Voltage - Supply, Digital (Max)5.5 V
Voltage - Supply, Digital (Min)2.7 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$Updated
DigikeyTube 1$ 8.19<1d
10$ 6.35
96$ 5.39
192$ 5.20
288$ 5.11
576$ 4.97
1056$ 4.87

CAD

3D models and CAD resources for this part

Description

General part information

AD5316 Series

The AD5316R, a member of thenanoDAC®family, is a low power, quad, 10-bit buffered voltage output DAC. The device includes a 2.5 V, 2 ppm/°C internal reference (enabled by default) and a gain select pin giving a full-scale output of 2.5 V (gain = 1) or 5 V (gain = 2). The device operates from a single 2.7 V to 5.5 V supply, is guaranteed monotonic by design, and exhibits less than 0.1% FSR gain error and 1.5 mV offset error performance. The device is available in a 3 mm × 3 mm lead lead frame chip scale package (LFCSP) and in a thin shrink small outline package (TSSOP).The AD5316R also incorporates a power-on reset circuit and a RSTSEL pin. The RSTSEL pin ensures that the DAC outputs power up to zero scale or midscale and remain at that level until a valid write takes place. The device contains a per channel power-down feature that reduces the current consumption of the device in power-down mode to 4 μA at 3 V.The AD5316R uses a versatile 2-wire serial interface that operates at clock rates up to 400 kHz and includes a VLOGICpin intended for 1.8 V/3 V/5 V logic.Product HighlightsPrecision DC Performance.Total unadjusted error (TUE): ±0.1% of FSR maximumOffset error: ±1.5 mV maximumGain error: ±0.1% of FSR maximumLow Drift 2.5 V On-Chip Reference.2 ppm/°C typical temperature coefficient5 ppm/°C maximum temperature coefficientTwo Package Options.3 mm × 3 mm, 16-lead LFCSP16-lead TSSOPApplicationsDigital gain and offset adjustmentProgrammable attenuatorsIndustrial automationData acquisition systems