Zenode.ai Logo
Beta
54-pin (NJY) package image
Integrated Circuits (ICs)

DS100KR401SQ/NOPB

Active
Texas Instruments

RELAY 8 WQFN-54-EP(5.5X10) SIGNAL BUFFERS, REPEATERS, SPLITTERS ROHS

54-pin (NJY) package image
Integrated Circuits (ICs)

DS100KR401SQ/NOPB

Active
Texas Instruments

RELAY 8 WQFN-54-EP(5.5X10) SIGNAL BUFFERS, REPEATERS, SPLITTERS ROHS

Technical Specifications

Parameters and characteristics for this part

SpecificationDS100KR401SQ/NOPB
Data Rate (Max)10.3 Gbps
Delay Time200 ps
InputCML
Mounting TypeSurface Mount
Number of Channels8
Operating Temperature [Max]85 °C
Operating Temperature [Min]-40 °C
OutputCML
Package / Case54-WFQFN Exposed Pad
Signal ConditioningInput Equalization, Output De-Emphasis
Supplier Device Package54-WQFN (10x5.5)
TypeReDriver, Buffer
Voltage - Supply [Max]3.6 V
Voltage - Supply [Min]2.375 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyTape & Reel (TR) 2000$ 11.32
LCSCPiece 1$ 33.39
200$ 12.92
500$ 12.47
1000$ 12.24
Texas InstrumentsLARGE T&R 1$ 14.54
100$ 12.70
250$ 9.79
1000$ 8.76

Description

General part information

DS100KR401 Series

The DS100KR401 is an extremely low power, high performance repeater designed to support 4 lane (bi-directional) 10G-KR and other high speed interface serial protocols up to 10.3 Gbps. The receiver's continuous time linear equalizer (CTLE) provides a boost of up to +36 dB at 5 GHz (10.3125 Gbps) in each of its eight channels and is capable of opening an input eye that is completely closed due to inter symbol interference (ISI) induced by interconnect medium such as long backplanes or cables, hence enabling host controllers to ensure an error free end-to-end link. The transmitter provides a de-emphasis boost of up to -12 dB and output voltage amplitude control from 700 mV to 1300 mV to allow maximum flexibility in the physical placement within the interconnect channel.

When operating in 10G-KR mode, the DS100KR401 transparently allows the host controller and the end point to optimize the full link and negotiate transmit equalizer coefficients as defined in the 802.3ap standard. This seamless management of the link training protocol ensures guaranteed system level interoperability with minimum latency.

With a low power consumption of 65 mW/channel (typ) and option to turn-off unused channels, the DS100KR401 enables energy efficient system design. A single supply of 3.3v or 2.5v is required to power the device.