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Technical Specifications
Parameters and characteristics for this part
| Specification | SN74ABT833DW |
|---|---|
| Current - Output High, Low [custom] | 64 mA |
| Current - Output High, Low [custom] | 32 mA |
| Mounting Type | Surface Mount |
| Number of Bits per Element | 8 |
| Number of Elements | 1 |
| Operating Temperature [Max] | 85 °C |
| Operating Temperature [Min] | -40 °C |
| Output Type | Push-Pull |
| Package / Case | 24-SOIC |
| Package / Case [custom] | 7.5 mm |
| Package / Case [custom] | 0.295 in |
| Supplier Device Package | 24-SOIC |
| Voltage - Supply [Max] | 5.5 V |
| Voltage - Supply [Min] | 4.5 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Tube | 625 | $ 1.44 | |
| Texas Instruments | TUBE | 1 | $ 1.83 | |
| 100 | $ 1.51 | |||
| 250 | $ 1.08 | |||
| 1000 | $ 0.81 | |||
Description
General part information
SN74ABT833 Series
The 'ABT833 8-bit to 9-bit parity transceivers are designed for communication between data buses. When data is transmitted from the A bus to the B bus, a parity bit is generated. When data is transmitted from the B bus to the A bus with its corresponding parity bit, the open-collector parity-error () output indicates whether or not an error in the B data has occurred. The output-enable (and) inputs can be used to disable the device so that the buses are effectively isolated. The 'ABT833 provide true data at their outputs.
A 9-bit parity generator/checker generates a parity-odd (PARITY) output and monitors the parity of the I/O ports with theflag.is clocked into the register on the rising edge of the clock (CLK) input. The error flag register is cleared with a low pulse on the clear () input. When bothandare low, data is transferred from the A bus to the B bus and inverted parity is generated. Inverted parity is a forced error condition that gives the designer more system diagnostic capability.
To ensure the high-impedance state during power up or power down,should be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Documents
Technical documentation and resources
