ADS1281IPW
ActiveULTRA-HIGH-RESOLUTION 4-KSPS 1-CHANNEL DELTA-SIGMA ADC FOR SEISMIC AND ENERGY EXPLORATION
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ADS1281IPW
ActiveULTRA-HIGH-RESOLUTION 4-KSPS 1-CHANNEL DELTA-SIGMA ADC FOR SEISMIC AND ENERGY EXPLORATION
Deep-Dive with AI
Technical Specifications
Parameters and characteristics for this part
| Specification | ADS1281IPW |
|---|---|
| Architecture | Sigma-Delta |
| Configuration | ADC |
| Data Interface | SPI |
| Input Type | Single Ended, Differential |
| Mounting Type | Surface Mount |
| Number of A/D Converters | 1 |
| Number of Bits | 31 |
| Number of Inputs | 1 |
| Operating Temperature [Max] | 85 °C |
| Operating Temperature [Min] | -40 °C |
| Package / Case | 24-TSSOP |
| Package / Case | 0.173 in, 4.4 mm |
| Reference Type | External |
| Sampling Rate (Per Second) | 4k |
| Supplier Device Package | 24-TSSOP |
| Voltage - Supply, Analog | 5 V |
| Voltage - Supply, Digital [Max] | 3.6 V |
| Voltage - Supply, Digital [Min] | 1.65 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Arrow | N/A | 60 | $ 47.19 | |
| Digikey | Tube | 1 | $ 59.24 | |
| 10 | $ 55.65 | |||
| 60 | $ 53.86 | |||
| 120 | $ 49.91 | |||
| Texas Instruments | TUBE | 1 | $ 54.39 | |
| 100 | $ 48.35 | |||
| 250 | $ 39.74 | |||
| 1000 | $ 35.55 | |||
Description
General part information
ADS1281 Series
The ADS1281 is an extremely high-performance, single-chip analog-to-digital converter (ADC) designed for the demanding needs of energy exploration and seismic monitoring environments. The single-chip design promotes board area savings for improvements in high-density applications.
The converter uses a fourth-order, inherently stable, delta-sigma () modulator that provides outstanding noise and linearity performance. The modulator is used either in conjunction with the on-chip digital filter, or can be bypassed for use with post-processing filters.
The digital filter consists of sinc and finite impulse response (FIR) low-pass stages followed by an infinite impulse response (IIR) high-pass filter (HPF) stage. Selectable decimation provides data rates from 250 to 4000 samples per second (SPS). The FIR low-pass stage provides both linear and minimum phase response. The HPF features an adjustable corner frequency. On-chip gain and offset scaling registers support system calibration.
Documents
Technical documentation and resources
