SN54LS93J
ActiveCOUNTER/DIVIDER SINGLE 4-BIT BINARY UP 14-PIN CDIP TUBE
Deep-Dive with AI
Search across all available documentation for this part.
SN54LS93J
ActiveCOUNTER/DIVIDER SINGLE 4-BIT BINARY UP 14-PIN CDIP TUBE
Deep-Dive with AI
Technical Specifications
Parameters and characteristics for this part
| Specification | SN54LS93J |
|---|---|
| Count Rate | 42 MHz |
| Direction | Up |
| Logic Type | Binary Counter |
| Mounting Type | Through Hole |
| Number of Bits per Element | 4 |
| Number of Elements | 1 |
| Operating Temperature [Max] | 125 °C |
| Operating Temperature [Min] | -55 °C |
| Package / Case | 14-CDIP |
| Reset | Asynchronous |
| Supplier Device Package | 14-CDIP |
| Trigger Type | Negative Edge |
| Voltage - Supply [Max] | 5.5 V |
| Voltage - Supply [Min] | 4.5 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Arrow | N/A | 1 | $ 12.75 | |
| 10 | $ 11.79 | |||
| 25 | $ 11.50 | |||
| Texas Instruments | TUBE | 1 | $ 13.03 | |
| 100 | $ 11.38 | |||
| 250 | $ 8.77 | |||
| 1000 | $ 7.85 | |||
Description
General part information
SN54LS93 Series
Each of these monolithic counters contains four master-slave flip-flops and additional gating to provide a divide-by-two counter and a three-stage binary counter for which the count cycle length is divide-by-five for the '90A and 'LS90, divide-by-six for the '92A and 'LS92, and the divide-by eight for the '93A and 'LS93.
All of these counters have a gated zero reset and the '90A and 'LS90 also have gated set-to-nine inputs for use in BCD nine's complement applications.
To use their maximum count length (decade, divide-by-twelve, or four-bit binary) of these counters, the CKB input is connected to the QAoutput. The input count pulses are applied to CKA input and the outputs are as described in the appropriate function table. A symmetrical divide-by-ten count can be obtained from the '90A or 'LS90 counters by connecting the QDoutput to the CKA input and applying the input count to the CKB input which gives a divide-by-ten square wave at output QA.
Documents
Technical documentation and resources
