Zenode.ai Logo
Beta
24 VFQFN
Integrated Circuits (ICs)

TLK1102ERGER

Active
Texas Instruments

IC INTERFACE SPECIALIZED 24VQFN

Deep-Dive with AI

Search across all available documentation for this part.

24 VFQFN
Integrated Circuits (ICs)

TLK1102ERGER

Active
Texas Instruments

IC INTERFACE SPECIALIZED 24VQFN

Deep-Dive with AI

Technical Specifications

Parameters and characteristics for this part

SpecificationTLK1102ERGER
ApplicationsNetworking
Interface2-Wire Serial
Mounting TypeSurface Mount
Package / Case24-VFQFN Exposed Pad
Supplier Device Package24-VQFN (4x4)
Voltage - Supply [Max]3.6 V
Voltage - Supply [Min]2.95 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyTape & Reel (TR) 3000$ 13.97

Description

General part information

TLK1102E Series

The TLK1102E is a versatile and flexible high-speed dual-channel equalizer for applications in digital high-speed links with data rates up to 11.3Gbps.

The TLK1102E can be configured in many ways through its two-wire serial interface, available through the SDA and the SCL pins, to optimize its performance. The configurable parameters include the output de-emphasis settable from 0 to 7dB, the output differential voltage swing settable from 225 to 1200mVp-p, the input equalization level settable for 0 to 20 meters of 24-AWG twinaxial cable, 0 to 40 inches of FR-4 PCB interconnect, or equivalent interconnect, the input filter bandwidth settable from 4.5 to 11GHz, and the LOS (loss of signal) assert voltage level.

Alternatively, the TLK1102E can be configured using its configuration pins in two modes selectable using the MODE pin. In Pin Control Mode 1, a common setting can be set for the two channels for the output de-emphasis level and the interconnect length using the DE pin and LN0, LN1 pins respectively. In Pin Control Mode 2, those parameters can be set individually for the two channels using DEA, DEB, LNA, and LNB pins. In both modes only a common setting is available for the output voltage swing using the SWG pin. For Pin Control Mode 2 the typical LOS assert and de-assert voltage levels are fixed at 90mVp-pand 150mVp-prespectively with 4.0dB hysteresis.

Documents

Technical documentation and resources

No documents available