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Analog Devices-MAX14866UTM+ Analog Switch Multiplexers Analog Switch Hexadecimal SPST 48-Pin TQFN EP Tray
Integrated Circuits (ICs)

MAX5864ETM+T

Active
Analog Devices Inc./Maxim Integrated

ULTRA-LOW-POWER, HIGH-DYNAMIC-PERFORMANCE, 22MSPS ANALOG FRONT END

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Analog Devices-MAX14866UTM+ Analog Switch Multiplexers Analog Switch Hexadecimal SPST 48-Pin TQFN EP Tray
Integrated Circuits (ICs)

MAX5864ETM+T

Active
Analog Devices Inc./Maxim Integrated

ULTRA-LOW-POWER, HIGH-DYNAMIC-PERFORMANCE, 22MSPS ANALOG FRONT END

Deep-Dive with AI

Technical Specifications

Parameters and characteristics for this part

SpecificationMAX5864ETM+T
Mounting TypeSurface Mount
Number of Bits10
Number of Channels [custom]4
Package / Case48-WFQFN Exposed Pad
Power (Watts)2.1 W
Supplier Device Package48-TQFN (7x7)
Voltage - Supply, Analog [Max]3.3 V
Voltage - Supply, Analog [Min]2.7 V
Voltage - Supply, Digital [Max] [custom]3.3 V
Voltage - Supply, Digital [Min] [custom]2.7 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyN/A 0$ 10.94

Description

General part information

MAX5864 Series

The MAX5864 ultra-low-power, highly integrated analog front end is ideal for portable communication equipment such as handsets, PDAs, WLAN, and 3G wireless terminals. The MAX5864 integrates dual 8-bit receive ADCs and dual 10-bit transmit DACs while providing the highest dynamic performance at ultra-low power. The ADCs' analog I-Q input amplifiers are fully differential and accept 1VP-Pfull-scale signals. Typical I-Q channel phase matching is ±0.1° and amplitude matching is ±0.03dB. The ADCs feature 48.5dB SINAD and 69dBc spurious-free dynamic range (SFDR) at fIN= 5.5MHz and fCLK= 22Msps. The DACs' analog I-Q outputs are fully differential with ±400mV full-scale output, and 1.4V common-mode level. Typical I-Q channel phase match is ±0.15° and amplitude match is ±0.05dB. The DACs also feature dual 10-bit resolution with 71.7dBc SFDR, and 57dB SNR at fOUT= 2.2MHz and fCLK= 22MHz.The ADCs and DACs operate simultaneously or independently for frequency-division duplex (FDD) and time-division duplex (TDD) modes. A 3-wire serial interface controls power-down and transceiver modes of operation. The typical operating power is 42mW at fCLK= 22Msps with the ADCs and DACs operating simultaneously in transceiver mode. The MAX5864 features an internal 1.024V voltage reference that is stable over the entire operating power-supply range and temperature range. The MAX5864 operates on a +2.7V to +3.3V analog power supply and a +1.8V to +3.3V digital I/O power supply for logic compatibility. The quiescent current is 5.6mA in idle mode and 1µA in shutdown mode. The MAX5864 is specified for the extended (-40°C to +85°C) temperature range and is available in a 48-pin thin QFN package.Applications3G Wireless TerminalsFixed/Mobile Broadband Wireless ModemsNarrowband/Wideband CDMA HandsetsPDAs

Documents

Technical documentation and resources