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LTC2144IUP-12#PBF
Integrated Circuits (ICs)

LTC2144IUP-12#PBF

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Analog Devices Inc./Maxim Integrated

12-BIT, 105MSPS LOW POWER DUAL ADCS

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LTC2144IUP-12#PBF
Integrated Circuits (ICs)

LTC2144IUP-12#PBF

Active
Analog Devices Inc./Maxim Integrated

12-BIT, 105MSPS LOW POWER DUAL ADCS

Technical Specifications

Parameters and characteristics for this part

SpecificationLTC2144IUP-12#PBF
ArchitecturePipelined
ConfigurationS/H-ADC
Data InterfaceParallel, LVDS - Parallel
FeaturesSimultaneous Sampling
Input TypeDifferential
Mounting TypeSurface Mount
Number of A/D Converters2
Number of Bits12
Number of Inputs2
Operating Temperature [Max]85 °C
Operating Temperature [Min]-40 C
Package / Case64-WFQFN Exposed Pad
Ratio - S/H:ADC1:1
Reference TypeInternal, External
Sampling Rate (Per Second)105 M
Supplier Device Package64-QFN
Supplier Device Package [x]9
Supplier Device Package [y]9
Voltage - Supply, Analog [Max]1.9 V
Voltage - Supply, Analog [Min]1.7 V
Voltage - Supply, Digital [Max] [custom]1.9 V
Voltage - Supply, Digital [Min] [custom]1.7 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$Updated
DigikeyN/A 238$ 60.351m+

Description

General part information

LTC2144-12 Series

The LTC2145-12/LTC2144-12/LTC2143-12 are 2-channel simultaneous sampling 12-bit A/D converters designed for digitizing high frequency, wide dynamic range signals. They are perfect for demanding communications applications with AC performance that includes 70.6dB SNR and 89dB spurious free dynamic range (SFDR). Ultralow jitter of 0.08psRMSallows undersampling of IF frequencies with excellent noise performance.DC specs include ±0.3LSB INL (typ), ±0.1LSB DNL (typ) and no missing codes over temperature. The transition noise is 0.3LSBRMS.The digital outputs can be either full rate CMOS, double data rate CMOS, or double data rate LVDS. A separate output power supply allows the CMOS output swing to range from 1.2V to 1.8V.The ENC+and ENC–inputs may be driven differentially or single-ended with a sine wave, PECL, LVDS, TTL, or CMOS inputs. An optional clock duty cycle stabilizer allows high performance at full speed for a wide range of clock duty cycles.BitsLTC2144-1212LTC2144-1414ApplicationsCommunicationsCellular Base StationsSoftware Defined RadiosPortable Medical ImagingMulti-Channel Data AcquisitionNondestructive Testing