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ADSP-21364KBCZ-1AA
Integrated Circuits (ICs)

ADSP-21364KBCZ-1AA

Active
Analog Devices Inc./Maxim Integrated

DIGITAL SIGNAL PROCESSORS & CONTROLLERS - DSP, DSC 333 MHZ, PROCESSOR W/ON CHIP BLANK ROM

Deep-Dive with AI

Search across all available documentation for this part.

DocumentsADSP-21364KBCZ-1AA | DatasheetVisualDSP++®5.0 Getting Started Guide (Rev.3.0)+64
ADSP-21364KBCZ-1AA
Integrated Circuits (ICs)

ADSP-21364KBCZ-1AA

Active
Analog Devices Inc./Maxim Integrated

DIGITAL SIGNAL PROCESSORS & CONTROLLERS - DSP, DSC 333 MHZ, PROCESSOR W/ON CHIP BLANK ROM

Deep-Dive with AI

DocumentsADSP-21364KBCZ-1AA | DatasheetVisualDSP++®5.0 Getting Started Guide (Rev.3.0)+64

Technical Specifications

Parameters and characteristics for this part

SpecificationADSP-21364KBCZ-1AA
Clock Rate (Frequency)333 MHz
InterfaceSPI, DAI
Mounting TypeSurface Mount
Non-Volatile Memory Size512 kB
Non-Volatile Memory TypeROM
On-Chip RAM384 kB
Operating Temperature (Max)70 °C
Operating Temperature (Min)0 °C
Package / CaseCSPBGA, 136-LFBGA
Package Length12 mm
Package Name136-CSPBGA
Package Width12 mm
TypeFloating Point
Voltage - Core1.2 V
Voltage - I/O3.3 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$Updated
DigikeyTray 1$ 89.47<1d
10$ 76.22
30$ 71.88
100$ 68.34
MouserN/A 1$ 77.531m+
10$ 62.71
25$ 59.33
50$ 57.35

CAD

3D models and CAD resources for this part

Description

General part information

ADSP-21364 Series

The ADSP-2136x SHARC®processor is a member of the SIMD SHARC family of DSPs that feature Analog Devices, Inc., Super Harvard Architecture. The processor is source code-compatible with the ADSP-2126x and ADSP-2116x DSPs, as well as with first generation ADSP-2106x SHARC processors in SISD (single-instruction, single-data) mode. The ADSP-2136x are 32-/40-bit floating-point processors optimized for high performance automotive audio applications. They contain a large on-chip SRAM and ROM, multiple internal buses to eliminate I/O bottlenecks, and an innovative digital audio interface (DAI).As shown in the functional block diagram on Page 1, the ADSP-2136x uses two computational units to deliver a significant performance increase over the previous SHARC processors on a range of signal processing algorithms. With its SIMD computational hardware, the ADSP-2136x can perform two GFLOPS running at 333 MHz.

Documents

Technical documentation and resources

ADSP-21364KBCZ-1AA | Datasheet

Datasheet

VisualDSP++®5.0 Getting Started Guide (Rev.3.0)

Software Manual

EE-223: In-Circuit Flash Programming on SHARC® Processors (Rev.2)

Application Note

Summit-ICE PCI Emulator Hardware Installation Guide (Rev.4)

Legacy Emulator Manual

VisualDSP++®5.0 C/C++ Compiler Manual for SHARC®Processors (Rev.1.5)

Software Manual

EE-248: Interfacing AD7676 ADCs to ADSP-21365 SHARC® Processors (Rev.1)

Application Note

EE-266: Programming S/PDIF on ADSP-2136x and ADSP-21371 SHARC® Processors (Rev.2)

Application Note

EE-104: Setting Up Streams with the VisualDSP Debugger

Application Note

EE-340: Connecting SHARC®and Blackfin®Processors over SPI (Rev.1)

Application Note

EE-355: Expert In-Circuit FLASH Programmer for SHARC® Processors (Rev.1)

Application Note

SHARC Processor Family

Product Highlight

VisualDSP++®5.0 Loader and Utilities Manual (Rev.2.5)

Software Manual

EE-189: Link Port Tips & Tricks For ADSP-2106x & ADSP-2116x SHARC® DSPs

Application Note

ICE-100B Emulator User’s Guide (Rev.1.1)

Emulator Manual

VisualDSP++®5.0 Kernel (VDK) Users Guide (Rev.3.5)

Software Manual

EE-305: Designing and Debugging Systems with SHARC Processors (Rev.1)

Application Note

EE-264: Interfacing MultiMediaCard™ with ADSP-2126x SHARC® Processors (Rev.1)

Application Note

Apex-ICE USB Emulator Hardware Installation Guide (Rev.6.0)

Legacy Emulator Manual

VisualDSP++®5.0 Assembler and Preprocessor Manual (Rev.3.4)

Software Manual

EE-220: Using External Memory with Third Generation SHARC® Processors and the Parallel Port (Rev.2)

Application Note

ADSP-21364 EZ-KIT Lite®Evaluation System Manual (Rev.3.3)

User Guide

EE-330: Windows Vista Compatibility in VisualDSP++ 5.0 Development Tools (Rev.1)

Application Note

EE-253: Power Bypass Decoupling of SHARC® Processors (Rev.1)

Application Note

VisualDSP++®5.0 Product Release Bulletin (Rev.3.0)

Software Manual

EE-110: A Quick Primer on ELF and DWARF File Formats

Application Note

EE-267: Implementing In-Place FFTs on SISD and SIMD SHARC® Processors (Rev.1)

Application Note

EE-254: Interfacing ADSP-21365 SHARC® PDAP to ADSP-BF533 Blackfin® EBIU (Rev.1)

Application Note

EE-320: Implementing an Ogg Vorbis Decoder on SHARC® Processors (Rev.1)

Application Note

SHARC®Processor Programming Reference (Includes ADSP-2136x, ADSP-2137x, and ADSP-214xx Processors) (Rev.2.4)

Processor Manual

SHARC®USB EZ-Extender®Manual (Rev.2.1)

User Guide

EE-332: Cycle Counting and Profiling (Rev.2)

Application Note

EE-232: Configuring the Signal Routing Unit of ADSP-2126x SHARC® DSPs (Rev.1)

Application Note

EE-202: Using the Expert Linker for Multiprocessor LDFs (Rev.3)

Application Note

EE-177: SHARC® SPI Slave Booting (Rev.3)

Application Note

VisualDSP++®5.0 Licensing Guide (Rev.1.4)

Software Manual

EE-323: Implementing Dynamically Loaded Software Modules (Rev.1)

Application Note

EE-295: Implementing Delay Lines on SHARC® Processors (Rev.1)

Application Note

EE-270: Extended-Precision Fixed-Point Arithmetic on SIMD SHARC® Processors (Rev.1)

Application Note

EE-296: Using the UART Port Controller on SHARC® Processors (Rev.2)

Application Note

EE-328: Migrating from ADSP-2106x/2116x to ADSP-2126x/2136x/2137x SHARC® Processors (Rev.1)

Application Note

VisualDSP++®5.0 Linker and Utilities Manual (Rev.3.5)

Software Manual

SHARC®EZ-Extender®Manual (Rev.3.1)

User Guide

Package Drawing - 136-Ball CSPBGA (12mm x 12mm)

Package Drawing

EE-68: Analog Devices JTAG Emulation Technical Reference (Rev.10)

Application Note

EE-191: Implementing a Glueless UART Using The SHARC® DSP SPORTs

Application Note

EE-261: Understanding Jitter Requirements of PLL-Based Processors (Rev.1)

Application Note

EE-290: Managing the Core PLL on SHARC® Processors (Rev.5)

Application Note

EE-345: Boot Kernel Customization and Firmware Upgradeability on SHARC Processors® (Rev.1)

Application Note

SHARC®Audio EZ-Extender®Manual (Rev.1.1)

User Guide

EE-322: Expert Code Generator for SHARC® Processors (Rev.5)

Application Note

EE-231: In-Circuit Programming of an SPI Flash with SHARC® Processors (Rev.2)

Application Note

VisualDSP++®5.0 Quick Installation Reference Card (Rev.3.1)

Software Manual

EE-277: Estimating Power for the ADSP-21362 SHARC® Processors (Rev.1)

Application Note

EE-69: Understanding and Using Linker Description Files on SHARC Processors (Rev.2)

Application Note

EE-268: Programming Asynchronous Sample Rate Converters on ADSP-2136x SHARC® Processors (Rev.1)

Application Note

EE-175: Emulator and Evaluation Hardware Troubleshooting Guide for VisualDSP++ Users (Rev.14)

Application Note

EE-56: Tips and Tricks on SHARC® EPROM and Host Boot Loader (Rev.3)

Application Note

ADSP-2136x SHARC®Processor Hardware Reference (includes the ADSP-21362/ADSP-21363/ADSP-21364/ADSP-21365/ADSP-21366 processors) (Rev.2.1)

Processor Manual

ICE-1000/ICE-2000 Emulator User’s Guide (Rev.1.2)

Emulator Manual

Blackfin®/SHARC®USB EZ-Extender®Manual (Rev.1.1)

User Guide

VisualDSP++®5.0 Run-Time Library Manual for SHARC®Processors (Rev.1.5)

Software Manual

EE-230: Code Overlays on the Third Generation SHARC® Family of Processors (Rev.2)

Application Note

HPUSB, USB, and HPPCI Emulator User’s Guide (Rev.3.2)

Emulator Manual

EE-260: Interfacing AD7865 Parallel ADCs to ADSP-2136x SHARC® Processors (Rev.1)

Application Note

EE-128: DSP in C++: Calling Assembly Class Member Functions From C++

Application Note

VisualDSP++®5.0 Users Guide (Rev.3.0)

Software Manual