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CD14538BPWR

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Texas Instruments

MONOSTABLE MULTIVIBRATOR DUAL-ELEMENT -55°C 125°C 16-PIN TSSOP T/R

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TSSOP (PW)
Integrated Circuits (ICs)

CD14538BPWR

Active
Texas Instruments

MONOSTABLE MULTIVIBRATOR DUAL-ELEMENT -55°C 125°C 16-PIN TSSOP T/R

Technical Specifications

Parameters and characteristics for this part

SpecificationCD14538BPWR
Current - Output High, Low [custom]6.8 mA
Current - Output High, Low [custom]6.8 mA
Independent Circuits2
Logic TypeMonostable
Mounting TypeSurface Mount
Operating Temperature [Max]125 °C
Operating Temperature [Min]-55 °C
Package / Case16-TSSOP
Package / Case [x]0.173 in
Package / Case [y]4.4 mm
Propagation Delay100 ns
Schmitt Trigger InputTrue
Supplier Device Package16-TSSOP
Voltage - Supply [Max]18 V
Voltage - Supply [Min]3 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyCut Tape (CT) 1$ 0.54
10$ 0.47
25$ 0.44
100$ 0.35
250$ 0.32
500$ 0.27
1000$ 0.21
Digi-Reel® 1$ 0.54
10$ 0.47
25$ 0.44
100$ 0.35
250$ 0.32
500$ 0.27
1000$ 0.21
Tape & Reel (TR) 2000$ 0.19
6000$ 0.18
10000$ 0.17
50000$ 0.16
Texas InstrumentsLARGE T&R 1$ 0.35
100$ 0.24
250$ 0.18
1000$ 0.12

Description

General part information

CD14538B Series

CD14538B dual precision monostable multivibrator provides stable retriggerable/resettable one-shot operation for any fixed-voltage timing application.

An external resistor (RX) and an external capacitor (CX) control the timing and accuracy for the circuit. Adjustment of RXand CXprovides a wide range of output pulse widths from the Q and Q\ terminals. The time delay from trigger input to output transition (trigger propagation delay) and the time delay from reset input to output transition (reset propagation delay) are independent of RXand CX. Precision control of output pulse widths is achieved through linear CMOS techniques.

Leading-edge-triggering (+TR) and trailing-edge-triggering (-TR) inputs are provided for triggering from either edge of an input pulse. An unused +TR input should be tied to VSS. An unused -TR input should be tied to VDD. A RESET (on low level) is provided for immediate termination of the output pulse or to prevent output pulses when power is turned on. An unused RESET input should be tied to VDD. However, if an entire section of the CD14538B is not used, its inputs must be tied to either VDDor VSS. See Table 1.