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24-SOIC
Integrated Circuits (ICs)

SN74LVC543ADWR

Active
Texas Instruments

OCTAL REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS

24-SOIC
Integrated Circuits (ICs)

SN74LVC543ADWR

Active
Texas Instruments

OCTAL REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS

Technical Specifications

Parameters and characteristics for this part

SpecificationSN74LVC543ADWR
Current - Output High, Low24 mA
Mounting TypeSurface Mount
Number of Bits per Element8
Number of Elements1
Operating Temperature [Max]85 °C
Operating Temperature [Min]-40 °C
Output Type3-State
Package / Case24-SOIC
Package / Case [custom]7.5 mm
Package / Case [custom]0.295 in
Supplier Device Package24-SOIC
Voltage - Supply [Max]3.6 V
Voltage - Supply [Min]1.65 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyCut Tape (CT) 1$ 1.52
10$ 1.36
25$ 1.29
100$ 1.09
250$ 1.03
500$ 0.90
1000$ 0.75
Digi-Reel® 1$ 1.52
10$ 1.36
25$ 1.29
100$ 1.09
250$ 1.03
500$ 0.90
1000$ 0.75
Tape & Reel (TR) 2000$ 0.64
Texas InstrumentsLARGE T&R 1$ 1.14
100$ 0.94
250$ 0.68
1000$ 0.51

Description

General part information

SN74LVC543A Series

This octal registered transceiver is designed for 1.65-V to 3.6-V VCCoperation.

The SN74LVC543A contains two sets of D-type latches for temporary storage of data flowing in either direction. Separate latch-enable (LEAB\ or LEBA\) and output-enable (OEAB\ or OEBA\) inputs are provided for each register to permit independent control in either direction of data flow.

The A-to-B enable (CEAB)\ input must be low to enter data from A or to output data from B. If CEAB\ is low and LEAB\ is low, the A-to-B latches are transparent; a subsequent low-to-high transition of LEAB\ places the A latches in the storage mode. With CEAB\ and OEAB\ both low, the 3-state B outputs are active and reflect the data present at the output of the A latches. Data flow for B to A is similar to that of A to B, but uses CEBA\, LEBA\, and OEBA\.

Documents

Technical documentation and resources

Use of the CMOS Unbuffered Inverter in Oscillator Circuits

Application note

16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)

Application note

Understanding Advanced Bus-Interface Products Design Guide

Application note

Logic Guide (Rev. AB)

Selection guide

LVC and LV Low-Voltage CMOS Logic Data Book (Rev. B)

User guide

Little Logic Guide 2018 (Rev. G)

Selection guide

Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)

Application note

Low-Voltage Logic (LVC) Designer's Guide

Design guide

Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices

Application note

Design Summary for WCSP Little Logic (Rev. B)

Product overview

LVC Characterization Information

Application note

Standard Linear & Logic for PCs, Servers & Motherboards

More literature

Input and Output Characteristics of Digital Integrated Circuits

Application note

CMOS Power Consumption and CPD Calculation (Rev. B)

Application note

Live Insertion

Application note

LOGIC Pocket Data Book (Rev. B)

User guide

STANDARD LINEAR AND LOGIC FOR DVD/VCD PLAYERS

More literature

Texas Instruments Little Logic Application Report

Application note

Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices

Application note

TI IBIS File Creation, Validation, and Distribution Processes

Application note

SN74LVC543A datasheet (Rev. H)

Data sheet

Selecting the Right Level Translation Solution (Rev. A)

Application note

How to Select Little Logic (Rev. A)

Application note

Signal Switch Data Book (Rev. A)

User guide

Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)

Application note

Implications of Slow or Floating CMOS Inputs (Rev. E)

Application note

Semiconductor Packing Material Electrostatic Discharge (ESD) Protection

Application note