
TPS259230-41EVM
ActiveEVALUATION MODULE TPS259230
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TPS259230-41EVM
ActiveEVALUATION MODULE TPS259230
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Technical Specifications
Parameters and characteristics for this part
| Specification | TPS259230-41EVM |
|---|---|
| Contents | Board(s) |
| Function | Electronic Fuses (eFuse) |
| Primary Attributes | 2-Channel (Dual) |
| Secondary Attributes | On-Board LEDs |
| Supplied Contents | Board(s) |
| Utilized IC / Part | TPS259230, TPS259241 |
TPS259230 Series
4.5-V to 5.5-V, 28mΩ, 1-5A eFuse with driver for external blocking FET
| Part | Utilized IC / Part | Secondary Attributes | Function | Contents | Supplied Contents | Primary Attributes | Current - Output | Operating Temperature [Max] | Operating Temperature [Min] | Accuracy | Package / Case | Mounting Type | Supplier Device Package | Voltage - Input [Max] | Voltage - Input [Min] |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Texas Instruments | TPS259230 TPS259241 | On-Board LEDs | Electronic Fuses (eFuse) | Board(s) | Board(s) | 2-Channel (Dual) | |||||||||
Texas Instruments | Electronic Fuse | 5 A | 85 °C | -40 °C | 8 % | 10-VFDFN Exposed Pad | Surface Mount | 10-VSON (3x3) | 5.5 V | 4.5 V | |||||
Texas Instruments | Electronic Fuse | 5 A | 85 °C | -40 °C | 8 % | 10-VFDFN Exposed Pad | Surface Mount | 10-VSON (3x3) | 5.5 V | 4.5 V | |||||
Texas Instruments | Electronic Fuse | 5 A | 85 °C | -40 °C | 8 % | 10-VFDFN Exposed Pad | Surface Mount | 10-VSON (3x3) | 5.5 V | 4.5 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Box | 1 | $ 90.00 | |
Description
General part information
TPS259230 Series
The TPS25923x family of eFuses is a highly integrated circuit protection and power management solution in a tiny package. The devices use few external components and provide multiple protection modes. They are a robust defense against overloads, shorts circuits, voltage surges, excessive inrush current, and reverse current.
Current limit level can be set with a single external resistor. Over voltage events are limited by internal clamping circuits to a safe fixed maximum, with no external components required. Applications with particular voltage ramp requirements can set dV/dT with a single capacitor to ensure proper output ramp rates.
Many systems, such as SSDs, must not allow holdup capacitance energy to dump back through the FET body diode onto a drooping or shorted input bus. The BFET pin is for such systems. An external NFET can be connected "Back to Back (B2B)" with the TPS25923x output and the gate driven by BFET to prevent current flow from load to source.
Documents
Technical documentation and resources