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Discrete Semiconductor Products

DTC013ZMT2L

Active
Rohm Semiconductor

NPN, SOT-723, R1≠R2 LEAK ABSORPTION TYPE DIGITAL TRANSISTOR (BIAS RESISTOR BUILT-IN TRANSISTOR)

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Product dimension image
Discrete Semiconductor Products

DTC013ZMT2L

Active
Rohm Semiconductor

NPN, SOT-723, R1≠R2 LEAK ABSORPTION TYPE DIGITAL TRANSISTOR (BIAS RESISTOR BUILT-IN TRANSISTOR)

Technical Specifications

Parameters and characteristics for this part

SpecificationDTC013ZMT2L
Current - Collector (Ic) (Max) [Max]100 mA
Current - Collector Cutoff (Max) [Max]500 nA
DC Current Gain (hFE) (Min) @ Ic, Vce [Min]30
Frequency - Transition250 MHz
Mounting TypeSurface Mount
Package / CaseSOT-723
Power - Max [Max]150 mW
Resistor - Base (R1)1 kOhms
Resistor - Emitter Base (R2)10 kOhms
Supplier Device PackageVMT3
Transistor TypeNPN - Pre-Biased
Vce Saturation (Max) @ Ib, Ic150 mV
Voltage - Collector Emitter Breakdown (Max) [Max]50 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyCut Tape (CT) 1$ 0.17
10$ 0.10
100$ 0.07
500$ 0.05
1000$ 0.04
2000$ 0.04
Digi-Reel® 1$ 0.17
10$ 0.10
100$ 0.07
500$ 0.05
1000$ 0.04
2000$ 0.04
Tape & Reel (TR) 8000$ 0.04
16000$ 0.04
24000$ 0.04
40000$ 0.03
56000$ 0.03
80000$ 0.03
200000$ 0.03
NewarkEach (Supplied on Cut Tape) 1$ 0.25
10$ 0.15
25$ 0.14
50$ 0.12
100$ 0.10
250$ 0.08
500$ 0.07
1000$ 0.06

Description

General part information

DTC013 Series

NPN 100mA 50V Digital Transistors(Bias Resistor Built-in Transistors)

Documents

Technical documentation and resources

Two-Resistor Model for Thermal Simulation

Thermal Design

DTC013ZM Data Sheet

Data Sheet

Impedance Characteristics of Bypass Capacitor

Schematic Design & Verification

Types and Features of Transistors

Application Note

About Export Regulations

Export Information

Importance of Probe Calibration When Measuring Power: Deskew

Schematic Design & Verification

Basics of Thermal Resistance and Heat Dissipation

Thermal Design

Certificate of not containing SVHC under REACH Regulation

Environmental Data

Method for Monitoring Switching Waveform

Schematic Design & Verification

Overview of ROHM's Simulation Models(for ICs and Discrete Semiconductors)

Technical Article

Explanation for Marking

Package Information

Condition of Soldering / Land Pattern Reference

Package Information

Notes for Temperature Measurement Using Forward Voltage of PN Junction

Thermal Design

ESD Data

Characteristics Data

Method for Calculating Junction Temperature from Transient Thermal Resistance Data

Thermal Design

What Is Thermal Design

Thermal Design

How to Create Symbols for PSpice Models

Models

List of Transistor Package Thermal Resistance

Thermal Design

Notes for Calculating Power Consumption:Static Operation

Thermal Design

Inner Structure

Package Information

Precautions When Measuring the Rear of the Package with a Thermocouple

Thermal Design

Temperature derating method for Safe Operating Area (SOA)

Schematic Design & Verification

How to Use LTspice® Models

Schematic Design & Verification

Part Explanation

Application Note

About Flammability of Materials

Environmental Data

Calculation of Power Dissipation in Switching Circuit

Schematic Design & Verification

Notes for Temperature Measurement Using Thermocouples

Thermal Design

Compliance of the RoHS directive

Environmental Data

Package Dimensions

Package Information

Moisture Sensitivity Level - Transistors

Package Information

Taping Information

Package Information

What is a Thermal Model? (Transistor)

Thermal Design

Measurement Method and Usage of Thermal Resistance RthJC

Thermal Design

Reliability Test Result

Manufacturing Data

PCB Layout Thermal Design Guide

Thermal Design

Anti-Whisker formation - Transistors

Package Information

How to Use LTspice® Models: Tips for Improving Convergence

Schematic Design & Verification

Technical Data Sheet EN

Datasheet