Integrated Circuits (ICs)

74AUP2G240GS,115

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LOW-POWER DUAL INVERTING BUFFER/LINE DRIVER; 3-STATE

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Documentsplastic, leadless extremely thin small outline package; 8 terminals; 0.35 mm pitch; 1.35 mm x 1 mm x 0.35 mm body Questions about package outline drawings +10

Integrated Circuits (ICs)

74AUP2G240GS,115

Active

Nexperia USA Inc.

LOW-POWER DUAL INVERTING BUFFER/LINE DRIVER; 3-STATE

Deep-Dive with AI

Documentsplastic, leadless extremely thin small outline package; 8 terminals; 0.35 mm pitch; 1.35 mm x 1 mm x 0.35 mm body Questions about package outline drawings +10

Specifications Series Pricing Description Documents

Technical Specifications

Parameters and characteristics for this part

Specification	74AUP2G240GS,115

Current - Output High, Low [custom]	4 mA
Current - Output High, Low [custom]	4 mA
Logic Type	Buffer, Inverting
Mounting Type	Surface Mount
Number of Bits per Element	1
Number of Elements	2
Operating Temperature [Max]	125 °C
Operating Temperature [Min]	-40 °C
Output Type	3-State
Package / Case	8-XFDFN
Supplier Device Package	8-XSON (1.35x1)
Voltage - Supply [Max]	3.6 V
Voltage - Supply [Min]	0.8 V

74AUP2G240GS Series

Low-power dual inverting buffer/line driver; 3-state

Part	Mounting Type	Voltage - Supply [Min]	Voltage - Supply [Max]	Package / Case	Current - Output High, Low [custom]	Current - Output High, Low [custom]	Number of Elements	Operating Temperature [Max]	Operating Temperature [Min]	Output Type	Logic Type	Supplier Device Package	Number of Bits per Element
Nexperia USA Inc. 74AUP2G240GS,115	Surface Mount	0.8 V	3.6 V	8-XFDFN	4 mA	4 mA	2	125 °C	-40 °C	3-State	Buffer Inverting	8-XSON (1.35x1)	1

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Digikey	N/A	0	$ 0.30
		73865	$ 0.63

Description

General part information

74AUP2G240GS Series

The 74AUP2G240 provides the dual inverting buffer/line driver with 3-state output. The 3-state output is controlled by the output enable input (nOE). A HIGH level at pin nOEcauses the output to assume a high-impedance OFF-state.