
74LVC16373ADGG-Q1J
Active16-BIT D-TYPE TRANSPARENT LATCH WITH 5 V TOLERANT INPUTS/OUTPUTS; 3-STATE
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74LVC16373ADGG-Q1J
Active16-BIT D-TYPE TRANSPARENT LATCH WITH 5 V TOLERANT INPUTS/OUTPUTS; 3-STATE
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Technical Specifications
Parameters and characteristics for this part
| Specification | 74LVC16373ADGG-Q1J |
|---|---|
| Circuit | 8:8 |
| Current - Output High, Low [custom] | 24 mA |
| Current - Output High, Low [custom] | 24 mA |
| Delay Time - Propagation | 1 ns |
| Grade | Automotive |
| Independent Circuits | 2 |
| Logic Type | D-Type Transparent Latch |
| Mounting Type | Surface Mount |
| Operating Temperature [Max] | 125 °C |
| Operating Temperature [Min] | -40 C |
| Output Type | Tri-State |
| Package / Case | 48-TFSOP |
| Package / Case [x] | 0.24 in |
| Package / Case [y] | 6.1 mm |
| Qualification | AEC-Q100 |
| Supplier Device Package | 48-TSSOP |
| Voltage - Supply [Max] | 3.6 V |
| Voltage - Supply [Min] | 1.65 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | N/A | 0 | $ 0.54 | |
Description
General part information
74LVC16373ADGG-Q100 Series
The 74LVC16373A-Q100 and 74LVCH16373A-Q100 are 16-bit D-type transparent latches with 3-state outputs. The devices can be used as two 8-bit transparent latches or a single 16-bit transparent latch. The devices feature two latch enables (1LE and 2LE) and two output enables (1OEand 2OE), each controlling 8-bits. When nLE is HIGH, data at the inputs enter the latches. In this condition the latches are transparent, a latch output will change each time its corresponding D-input changes. When nLE is LOW the latches store the information that was present at the inputs a set-up time preceding the HIGH-to-LOW transition of nLE. A HIGH on nOEcauses the outputs to assume a high-impedance OFF-state. Operation of the nOEinput does not affect the state of the latches. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments.
Documents
Technical documentation and resources