Specification	SN74AHCT1G08DCKT

Current - Output High, Low [custom]	8 mA
Current - Output High, Low [custom]	8 mA
Current - Quiescent (Max) [Max]	1 çA
Input Logic Level - Low	0.8 V
Logic Type	AND Gate
Max Propagation Delay @ V, Max CL	7.9 ns
Mounting Type	Surface Mount
Number of Circuits	1
Number of Inputs	2
Operating Temperature [Max]	125 °C
Operating Temperature [Min]	-40 °C
Package / Case	SC-70-5, 5-TSSOP, SOT-353
Supplier Device Package	SC-70-5
Voltage - Supply [Max]	5.5 V
Voltage - Supply [Min]	4.5 V

SN74AHCT1G08 Series

1-ch 2-input 4.5-V to 5.5-V AND gate with TTL-compatible CMOS inputs

Part	Input Logic Level - Low	Number of Inputs	Supplier Device Package	Voltage - Supply [Min]	Voltage - Supply [Max]	Logic Type	Package / Case	Operating Temperature [Max]	Operating Temperature [Min]	Mounting Type	Number of Circuits	Current - Output High, Low [custom]	Current - Output High, Low [custom]	Current - Quiescent (Max) [Max]	Max Propagation Delay @ V, Max CL
Texas Instruments SN74AHCT1G08DCKT	0.8 V	2	SC-70-5	4.5 V	5.5 V	AND Gate	5-TSSOP SC-70-5 SOT-353	125 °C	-40 °C	Surface Mount	1	8 mA	8 mA	1 çA	7.9 ns
Texas Instruments SN74AHCT1G08DBVT	0.8 V	2	SOT-23-5	4.5 V	5.5 V	AND Gate	SC-74A SOT-753	125 °C	-40 °C	Surface Mount	1	8 mA	8 mA	1 çA	7.9 ns
Texas Instruments 74AHCT1G08DBVTG4	0.8 V	2	SOT-23-5	4.5 V	5.5 V	AND Gate	SC-74A SOT-753	125 °C	-40 °C	Surface Mount	1	8 mA	8 mA	1 çA	7.9 ns
Texas Instruments 74AHCT1G08DCKRG4	0.8 V	2	SC-70-5	4.5 V	5.5 V	AND Gate	5-TSSOP SC-70-5 SOT-353	125 °C	-40 °C	Surface Mount	1	8 mA	8 mA	1 çA	7.9 ns
Texas Instruments SN74AHCT1G08DCK3	0.8 V	2	SC-70-5	4.5 V	5.5 V	AND Gate	5-TSSOP SC-70-5 SOT-353	125 °C	-40 °C	Surface Mount	1	8 mA	8 mA	1 çA	7.9 ns
Texas Instruments 74AHCT1G08DRLRG4	0.8 V	2	SOT-5	4.5 V	5.5 V	AND Gate	SOT-553	125 °C	-40 °C	Surface Mount	1	8 mA	8 mA	1 çA	7.9 ns
Texas Instruments 74AHCT1G08DCKRE4	0.8 V	2	SC-70-5	4.5 V	5.5 V	AND Gate	5-TSSOP SC-70-5 SOT-353	125 °C	-40 °C	Surface Mount	1	8 mA	8 mA	1 çA	7.9 ns
Texas Instruments SN74AHCT1G08DRLR	0.8 V	2	SOT-5	4.5 V	5.5 V	AND Gate	SOT-553	125 °C	-40 °C	Surface Mount	1	8 mA	8 mA	1 çA	7.9 ns
Texas Instruments 74AHCT1G08DBVRE4	0.8 V	2	SOT-23-5	4.5 V	5.5 V	AND Gate	SC-74A SOT-753	125 °C	-40 °C	Surface Mount	1	8 mA	8 mA	1 çA	7.9 ns
Texas Instruments SN74AHCT1G08DCKR	0.8 V	2	SC-70-5	4.5 V	5.5 V	AND Gate	5-TSSOP SC-70-5 SOT-353	125 °C	-40 °C	Surface Mount	1	8 mA	8 mA	1 çA	7.9 ns

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Digikey	Cut Tape (CT)	1	$ 1.58
		10	$ 1.00
		25	$ 0.85
		100	$ 0.67
	Digi-Reel®	1	$ 1.58
		10	$ 1.00
		25	$ 0.85
		100	$ 0.67
	Tape & Reel (TR)	1000	$ 0.49
		1250	$ 0.48
		1750	$ 0.46
		2500	$ 0.45
		6250	$ 0.41
		12500	$ 0.39
		25000	$ 0.37
Texas Instruments	SMALL T&R	1	$ 0.83
		100	$ 0.56
		250	$ 0.43
		1000	$ 0.29

Description

General part information

SN74AHCT1G08 Series

The SN74AHCT1G08 device is a single 2-input positive-AND gate. The device performs the Boolean function Y = A × B or Y = A + B in positive logic. Low ICC current allows this device to be used in power-sensitive or battery-powered applications.

Documents

Technical documentation and resources

Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)

Application note

SN74AHCT1G08DCKT

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SN74AHCT1G08DCKT

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Technical Specifications

SN74AHCT1G08 Series

Pricing

Description

SN74AHCT1G08 Series

Documents

Military Advanced High-Speed CMOS Logic (AHC/AHCT) (Rev. C)

How to Select Little Logic (Rev. A)

SN74AHCT1G08 Single 2-Input Positive-AND Gate datasheet (Rev. S)

Little Logic Guide 2018 (Rev. G)

Logic Guide (Rev. AB)

AHC/AHCT Designer's Guide February 2000 (Rev. D)

Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices

Texas Instruments Little Logic Application Report

Advanced High-Speed CMOS (AHC) Logic Family (Rev. C)

CMOS Power Consumption and CPD Calculation (Rev. B)

LOGIC Pocket Data Book (Rev. B)

Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)

Semiconductor Packing Material Electrostatic Discharge (ESD) Protection

Design Summary for WCSP Little Logic (Rev. B)

Implications of Slow or Floating CMOS Inputs (Rev. E)

Live Insertion

TI IBIS File Creation, Validation, and Distribution Processes

Selecting the Right Level Translation Solution (Rev. A)

Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)

SN74AHCT1G08 Series