
HMC794LP3ETR
Obsolete2 GHZ LOW NOISE PROGRAMMABLE DIVIDER (N = 1 TO 4) SMT
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HMC794LP3ETR
Obsolete2 GHZ LOW NOISE PROGRAMMABLE DIVIDER (N = 1 TO 4) SMT
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Technical Specifications
Parameters and characteristics for this part
| Specification | HMC794LP3ETR |
|---|---|
| Frequency [Max] | 2 GHz |
| Frequency [Min] | 200 MHz |
| Size / Dimension [x] | 3 mm |
| Size / Dimension [x] | 0.118 " |
| Size / Dimension [y] | 0.118 in |
| Size / Dimension [y] | 3 mm |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | Updated |
|---|---|---|---|---|
| Digikey | N/A | 0 | $ 0.00 | 1m+ |
Description
General part information
HMC794 Series
The HMC794LP3E is a SiGe BiCMOS low noise programmable frequency divider in a 3 × 3mm leadless surface mount package. The circuit can be programmed to divide from N = 1 to N = 4 in the 200 MHz to 2 GHz input frequency range. The high level output power (up to 10 dBm) with a very low SSB phase noise and 50% duty cycle makes this device ideal for low noise clock generation, LO generation and LO drive applications. Configurable bias controls allow power minimization of up to 20%.APPLICATIONSLO Generation with Low Noise FloorClock GeneratorsMixer LO DriveMilitary ApplicationsTest EquipmentSensors
Documents
Technical documentation and resources