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8-SOIC
Isolators

HCPL-0930-500E

Active
Broadcom Limited

DIGITAL ISOLATOR, 2 CHANNELS, 3 V, 5.5 V, SOIC, 8 PINS, 110 MBAUD

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8-SOIC
Isolators

HCPL-0930-500E

Active
Broadcom Limited

DIGITAL ISOLATOR, 2 CHANNELS, 3 V, 5.5 V, SOIC, 8 PINS, 110 MBAUD

Deep-Dive with AI

Technical Specifications

Parameters and characteristics for this part

SpecificationHCPL-0930-500E
Channel TypeUnidirectional
Common Mode Transient Immunity (Min) [Min]15 kV/µs
Data Rate110 MBd
Inputs - Side 1/Side 2 [custom]2
Inputs - Side 1/Side 2 [custom]0
Isolated PowerFalse
Mounting TypeSurface Mount
Number of Channels [custom]2
Operating Temperature [Max]125 °C
Operating Temperature [Min]-55 °C
Package / Case8-SOIC
Package / Case [x]0.154 in
Package / Case [y]3.9 mm
Propagation Delay tpLH / tpHL (Max) [custom]15 ns
Propagation Delay tpLH / tpHL (Max) [custom]15 ns
Pulse Width Distortion (Max) [Max]3 ns
Rise / Fall Time (Typ) [custom]1 ns
Rise / Fall Time (Typ) [custom]1 ns
Supplier Device Package8-SOIC
TechnologyGMR (Giant Magnetoresistive)
TypeGeneral Purpose
Voltage - Isolation2500 Vrms
Voltage - Supply [Max]5.5 V
Voltage - Supply [Min]3 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyCut Tape (CT) 1$ 13.97
10$ 9.92
25$ 8.88
100$ 7.71
250$ 7.15
500$ 6.81
Digi-Reel® 1$ 13.97
10$ 9.92
25$ 8.88
100$ 7.71
250$ 7.15
500$ 6.81
Tape & Reel (TR) 1500$ 6.63

Description

General part information

HCPL-0930 Series

HCPL-0930-500E is a dual CMOS high speed digital isolator. It features high speed performance and excellent transient immunity specifications. The symmetric magnetic coupling barrier gives this device a typical pulse width distortion of 2ns, a typical propagation delay skew of 4ns and 100Mbaud data rate, making them the industry’s fastest digital isolators. It is used in applications such as digital fieldbus isolation, multiplexed data transmission, computer peripheral interface, high-speed digital systems, isolated data interfaces, logic level shifting.

Documents

Technical documentation and resources