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16 SOIC
Integrated Circuits (ICs)

SN65LVDS3486DG4

Unknown
Texas Instruments

IC RECEIVER 0/4 16SOIC

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Search across all available documentation for this part.

16 SOIC
Integrated Circuits (ICs)

SN65LVDS3486DG4

Unknown
Texas Instruments

IC RECEIVER 0/4 16SOIC

Deep-Dive with AI

Technical Specifications

Parameters and characteristics for this part

SpecificationSN65LVDS3486DG4
Data Rate400 Mbps
Mounting TypeSurface Mount
Number of Drivers/Receivers [custom]0
Number of Drivers/Receivers [custom]4
Operating Temperature [Max]85 °C
Operating Temperature [Min]-40 °C
Package / Case16-SOIC
Package / Case [x]0.154 in
Package / Case [y]3.9 mm
ProtocolLVDS
Receiver Hysteresis50 mV
Supplier Device Package16-SOIC
TypeReceiver
Voltage - Supply [Max]3.6 V
Voltage - Supply [Min]3 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyTube 200$ 3.00

Description

General part information

SN65LVDS3486B Series

This family of differential line receivers offers improved performance and features that implement the electrical characteristics of low-voltage differential signaling (LVDS). LVDS is defined in the TIA/EIA-644 standard. This improved performance represents the second generation of receiver products for this standard, providing a better overall solution for the cabled environment. This generation of products is an extension to TI's overall product portfolio and is not necessarily a replacement for older LVDS receivers.

Improved features include an input common-mode voltage range 2 V wider than the minimum required by the standard. This will allow longer cable lengths by tripling the allowable ground noise tolerance to 3 V between a driver and receiver. TI has additionally introduced an even wider input common-mode voltage range of -4 to 5 V in their SN65LVDS/T33 and SN65LVDS/T34.

Precise control of the differential input voltage thresholds now allows for inclusion of 50 mV of input voltage hysteresis to improve noise rejection on slowly changing input signals. The input thresholds are still no more than ±50 mV over the full input common-mode voltage range.

Documents

Technical documentation and resources

No documents available