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20-CDIP
Integrated Circuits (ICs)

JBP28L42MJ

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Texas Instruments

PROM PARALLEL 4K-BIT 5V 20-PIN CDIP TUBE

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20-CDIP
Integrated Circuits (ICs)

JBP28L42MJ

Active
Texas Instruments

PROM PARALLEL 4K-BIT 5V 20-PIN CDIP TUBE

Technical Specifications

Parameters and characteristics for this part

SpecificationJBP28L42MJ
Access Time110 ns
Memory FormatPROM
Memory InterfaceParallel
Memory Organization [custom]512
Memory Organization [custom]8
Memory Size4 Kbit
Memory TypeNon-Volatile
Mounting TypeThrough Hole
Operating Temperature [Max]125 °C
Operating Temperature [Min]-55 °C
Package / Case20-CDIP
Supplier Device Package20-CDIP
Voltage - Supply [Max]5.5 V
Voltage - Supply [Min]4.5 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
Texas InstrumentsTUBE 1$ 71.74
100$ 63.77
250$ 52.42
1000$ 46.89

Description

General part information

JBP28L42 Series

The 24 and 28 Series of monolithic TTL programmable read-only memories (PROMs) feature an expanded selection of standard and low-power PROMs. This expanded PROM family provides the system designer with considerable fexibility in upgrading existing designs or optimizing new designs. Featuring proven titanium-tungsten (Ti-W) fuse links with low-current MOS-compatible p-n-p inputs, all family members utilize a common programming technique designed to program each link with a 20-microsecond pulse.

The 4096-bit and 8192-bit PROMs are offered in a wide variety of packages ranging from 18-pin 300 mil-wide thru 24 pin 600 mil-wide. The 16,384-bit PROMs provide twice the bit density of the 8192-bit PROMs and are provided in a 24 pin 600 mil-wide package.

All PROMs are supplied with a logic-high output level stored at each bit location. The programming procedure will produce open-circuits in the Ti-W metal links, which reverses the stored logic level at the selected location. The procedure is irreversible; once altered, the output for that bit location is permanently programmed. Outputs that have never been altered may later be programmed to supply the opposite output level. Operation of the unit within the recommended operating conditions will not alter the memory content.