
CY62157EV30LL-45ZSXIT
ActiveSRAM, ASYNCHRONOUS SRAM, 8 MBIT, 512K X 16BIT, TSOP-II, 44 PINS, 2.2 V
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CY62157EV30LL-45ZSXIT
ActiveSRAM, ASYNCHRONOUS SRAM, 8 MBIT, 512K X 16BIT, TSOP-II, 44 PINS, 2.2 V
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Technical Specifications
Parameters and characteristics for this part
| Specification | CY62157EV30LL-45ZSXIT |
|---|---|
| Access Time | 45 ns |
| Memory Format | SRAM |
| Memory Interface | Parallel |
| Memory Organization | 512K x 16 |
| Memory Size | 1024 KB |
| Memory Type | Volatile |
| Mounting Type | Surface Mount |
| Operating Temperature [Max] | 85 C |
| Operating Temperature [Min] | -40 ¯C |
| Package / Case | 44-TSOP (0.400", 10.16mm Width) |
| Supplier Device Package | 44-TSOP II |
| Technology | SRAM - Asynchronous |
| Voltage - Supply [Max] | 3.6 V |
| Voltage - Supply [Min] | 2.2 V |
| Write Cycle Time - Word, Page [custom] | 45 ns |
| Write Cycle Time - Word, Page [custom] | 45 ns |
Pricing
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Description
General part information
CY62157EV30LL Series
CY62157EV30LL-45ZSXIT is a high performance CMOS static RAM organized as 512K words by 16 bits. This device features advanced circuit design to provide ultra low active current. This is ideal for providing More Battery Life™ (MoBL®) in portable applications such as cellular telephones. The device also has an automatic power down feature that significantly reduces power consumption when addresses are not toggling. Place the device into standby mode when deselected (active-low CE1 HIGH or CE2 LOW or both active-low BHE and active-low BLE are HIGH). The input or output pins (I/O0 through I/O15) are placed in a high impedance state when the device is deselected (active-low CE1 HIGH or CE2 LOW), the outputs are disabled (active-low OE HIGH), byte high enable and byte low enable are disabled (active-low BHE, active-low BLE HIGH), or a write operation is active (active-low CE1 LOW, CE2 HIGH and active-low WE LOW). Applications include smart buildings, uninterruptible power supplies (UPS).
Documents
Technical documentation and resources