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Technical Specifications
Parameters and characteristics for this part
| Specification | 74HCT259BQ-Q100,11 |
|---|---|
| Circuit | 1:8 |
| Current - Output High, Low [custom] | 4 mA |
| Current - Output High, Low [custom] | 4 mA |
| Delay Time - Propagation | 20 ns |
| Grade | Automotive |
| Independent Circuits | 1 |
| Logic Type | D-Type, Addressable |
| Mounting Type | Surface Mount |
| Operating Temperature [Max] | 125 °C |
| Operating Temperature [Min] | -40 C |
| Output Type | Standard |
| Package / Case | 16-VFQFN Exposed Pad |
| Qualification | AEC-Q100 |
| Supplier Device Package | 16-DHVQFN (2.5x3.5) |
| Voltage - Supply [Max] | 5.5 V |
| Voltage - Supply [Min] | 4.5 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | N/A | 0 | $ 0.26 | |
Description
General part information
74HCT259BQ-Q100 Series
The 74HC259-Q100; 74HCT259-Q100 is an 8-bit addressable latch. The device features four modes of operation. In the addressable latch mode, data on the D input is written into the latch addressed by the inputs A0 to A3. The addressed latch will follow the data input, non-addressed latches will retain their previous states. In memory mode, all latches retain their previous states and are unaffected by the data or address inputs. In the 3-to-8 decoding or demultiplexing mode, the addressed output follows the D input and all other outputs are LOW. In the reset mode, all outputs are forced LOW and unaffected by the data or address inputs. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.
Documents
Technical documentation and resources