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ADSP-SC598KBPZ8
Integrated Circuits (ICs)

ADSP-SC598KBPZ8

Active
Analog Devices Inc./Maxim Integrated

DIGITAL SIGNAL PROCESSORS & CONTROLLERS - DSP, DSC SHARC+ WITH CORTEX A55 812.5 MHZ

ADSP-SC598KBPZ8
Integrated Circuits (ICs)

ADSP-SC598KBPZ8

Active
Analog Devices Inc./Maxim Integrated

DIGITAL SIGNAL PROCESSORS & CONTROLLERS - DSP, DSC SHARC+ WITH CORTEX A55 812.5 MHZ

Technical Specifications

Parameters and characteristics for this part

SpecificationADSP-SC598KBPZ8
Clock Rate812.5 MHz, 1.2 GHz
InterfaceDDR3, DAI, USB OTG, EBI/EMI, DDR2, I2C, SPI, CAN, SPORT, UART/USART, Ethernet
Mounting TypeSurface Mount
Non-Volatile MemoryExternal
On-Chip RAM2 MB
Operating Temperature125 ¯C
Operating Temperature0 °C
Package / Case400-FBGA
Supplier Device Package400-BGA (17x17)
TypeFixed/Floating Point
Voltage - Core1 V
Voltage - I/O3.3 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$Updated
DigikeyTray 1$ 64.60<1d
13$ 53.78
26$ 51.71
104$ 48.51
MouserN/A 1$ 52.611m+
10$ 47.27
90$ 47.26

CAD

3D models and CAD resources for this part

Description

General part information

ADSP-SC598 Series

Reaching speeds of up to 1 GHz, the ADSP-SC598/SC596/SC595 processors are members of the ADSP-SC59x SHARC®family of products. Containing the same dual-SHARC+®DSP core architecture as the ADSP-SC594/SC592/SC591, these processors upgrade the integrated Arm core to a Cortex-A55 running at up to 1.2 GHz. The A55 processor, with FPU and Neon®DSP extensions, handles additional real-time processing tasks and manages peripherals used to interface to time-critical data in audio applications. These interfaces include Gigabit Ethernet, USB High-Speed, CAN FD, and a rich variety of other connectivity options for a flexible and simplified system design.The ADSP-SC59x SHARC processors are members of the SIMD SHARC family of digital signal processors (DSPs) that feature Analog Devices, Inc., Super Harvard Architecture. These 32-bit/40-bit/64-bit floating-point processors are optimized for high performance audio/floating-point applications with large on-chip static random-access memory (SRAM), multiple internal buses that eliminate input/output (I/O) bottlenecks, and innovative digital audio interfaces (DAI). New additions to the SHARC+ core include cache enhancements and branch prediction, while maintaining instruction set compatibility to previous SHARC products.By integrating a rich set of industry-leading system peripherals and memory (see Table 1 in the data sheet), the SHARC+ processor is the platform of choice for applications that require programmability similar to reduced instruction set computing (RISC), multimedia support, and leading edge signal processing in one integrated package. These applications span a wide array of markets, including automotive, professional audio, and industrial-based applications that require high floating-point performance.ApplicationsAutomotive:audio amplifier, head unit, ANC/RNC, rear seat entertainment, digital cockpit, ADASConsumer & Professional Audio:speakers, sound bars, AVRs, conferencing systems, mixing consoles, microphone arrays, headphones

Documents

Technical documentation and resources

ADSP-SC595/SC596/SC598 SHARC+ Processor Hardware Reference (Rev.0.3)

Processor Manual

EE-433: Estimating Power for ADSP-2159x/SC59x SHARC+ Processors

Application Note

EE-448: Safe Power-down Mechanisms for Digital Processors

Application Note

EE-443: ADSP-SC595/SC596/SC598 Programming Guidelines for Dynamic Memory Controller

Application Note

EE-440: Estimating Power for SC596/SC598 SHARC+ Processors

Application Note

EE-438: Boot Time Estimation for ADSP-SC598 SHARC+ Processors

Application Note

SHARC+ Core Programming Reference

Processor Manual

ADSP-SC596/SC598: SHARC+ Dual-Core DSP with Arm Cortex-A55 Data Sheet (Rev.B)

Data Sheet

EE-436: Using ADSP-SC59x/2159x High Performance FIR/IIR Accelerators (Rev.2)

Application Note

EE-451: ADSP-SC596/SC598 Processor Thermal Guidelines (Rev.1)

Application Note

EE-444: Guidelines For Optimal Use Of eMSI on ADSP-SC598 SHARC+ Processor Family

Application Note

EE-434: ADSP-2159x/SC59x Board Design Guidelines for Dynamic Memory Controller

Application Note

EE-441: ADSP-SC596/SC598 Board Design Guidelines for Dynamic Memory Controller (Rev.1)

Application Note

EE-437: OSPI PHY Configuration and Training (Rev.1)

Application Note

ADSP-SC595/SC596/SC598 Anomaly List (Rev.E)

Integrated Circuit Anomaly

Package Drawing - 400-Ball BGA_ED (17mm x 17mm x 1.649mm)

Package Drawing

EE-430: Migrating from ADSP-2156x to ADSP-SC59x Processors

Application Note

EE-445: ADSP-SC59x SHARC+ Processor System Optimization Techniques

Application Note

EE-432: Boot Time Estimation for ADSP-SC59x/ADSP-2159x SHARC+ Processors

Application Note