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AD5381BSTZ-5
Integrated Circuits (ICs)

AD5381BSTZ-5

Active
Analog Devices Inc./Maxim Integrated

40-CHANNEL, 3 V/5 V, SINGLE-SUPPLY,12-BIT,DENSEDAC

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AD5381BSTZ-5
Integrated Circuits (ICs)

AD5381BSTZ-5

Active
Analog Devices Inc./Maxim Integrated

40-CHANNEL, 3 V/5 V, SINGLE-SUPPLY,12-BIT,DENSEDAC

Technical Specifications

Parameters and characteristics for this part

SpecificationAD5381BSTZ-5
ArchitectureString DAC
Data InterfaceSPI, I2C, DSP, Parallel
Differential OutputNo
DNL (Max) (LSB)1 LSB
INL (Max) (LSB)1 LSB
Mounting TypeSurface Mount
Number of Bits12 bits
Number of D/A Converters40 count
Operating Temperature (Max)85 °C
Operating Temperature (Min)-40 °C
Output TypeVoltage - Buffered
Package / Case100-LQFP
Package Length14 mm
Package Name100-LQFP
Package Width14 mm
Reference TypeExternal, Internal
Settling Time8 µs
Voltage - Supply, Analog5 V
Voltage - Supply, Digital (Max)5.5 V
Voltage - Supply, Digital (Min)2.7 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$Updated
DigikeyTray 1$ 112.59<1d
16$ 92.14
32$ 89.07
104$ 85.04

CAD

3D models and CAD resources for this part

Description

General part information

AD5381 Series

The AD5381 is a complete, single-supply, 40-channel, 12-Bit DAC available in a 100-lead LQFP package. All 40 channels have an on-chip output amplifier with rail-to-rail operation. The AD5381 includes a programmable internal 1.25 V/2.5 V, 10 ppm/°C reference, an on-chip channel monitor function that multiplexes the analog outputs to a common MON_OUT pin for external monitoring, and an output amplifier boost mode, which allows optimization of the amplifier slew rate. The AD5381 contains a double-buffered parallel interface featuring 20 nsWRpulse width, an SPI-/QSPI-/MICROWIRE-/DSP-compatible serial interface with interface speeds in excess of 30 MHz, and an I2C-compatible interface that supports a 400 kHz data transfer rate.An input register followed by a DAC register provides double buffering, allowing the DAC outputs to be updated independently or simultaneously using theLDACinput.Each channel has a programmable gain and offset adjust register that allows the user to fully calibrate any DAC channel. Power consumption is typically 0.25 mA/channel with boost mode disabled.APPLICATIONSVariable optical attenuators (VOAs)Level setting (ATE)Optical micro-electro-mechanical systems (MEMS)Control systemsInstrumentation