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Nexperia-74HCT377PW-Q100J Flip Flops Flip Flop D-Type Bus Interface Pos-Edge 1-Element Automotive 20-Pin TSSOP T/R
Integrated Circuits (ICs)

74AHCT573PW,118

Active
Nexperia USA Inc.

LATCH, 74AHCT573, D TYPE TRANSPARENT, TRI STATE NON INVERTED, 7.5 NS, 8 MA, 20 PINS, TSSOP

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Nexperia-74HCT377PW-Q100J Flip Flops Flip Flop D-Type Bus Interface Pos-Edge 1-Element Automotive 20-Pin TSSOP T/R
Integrated Circuits (ICs)

74AHCT573PW,118

Active
Nexperia USA Inc.

LATCH, 74AHCT573, D TYPE TRANSPARENT, TRI STATE NON INVERTED, 7.5 NS, 8 MA, 20 PINS, TSSOP

Technical Specifications

Parameters and characteristics for this part

Specification74AHCT573PW,118
Circuit8:8
Current - Output High, Low [custom]8 mA
Current - Output High, Low [custom]8 mA
Delay Time - Propagation3.5 ns
Independent Circuits1
Logic TypeD-Type Transparent Latch
Mounting TypeSurface Mount
Operating Temperature [Max]125 °C
Operating Temperature [Min]-40 C
Output TypeTri-State
Package / Case20-TSSOP
Package / Case [x]0.173 "
Package / Case [y]4.4 mm
Supplier Device Package20-TSSOP
Voltage - Supply [Max]5.5 V
Voltage - Supply [Min]4.5 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyN/A 284$ 0.43

Description

General part information

74AHCT573PW Series

The 74AHC573; 74AHCT573 is an 8-bit D-type transparent latch with 3-state outputs. The device features latch enable (LE) and output enable (OE) inputs. When LE is HIGH, data at the inputs enter the latches. In this condition the latches are transparent, a latch output will change each time its corresponding D-input changes. When LE is LOW the latches store the information that was present at the inputs a set-up time preceding the HIGH-to-LOW transition of LE. A HIGH onOEcauses the outputs to assume a high-impedance OFF-state. Operation of theOEinput does not affect the state of the latches. Inputs are overvoltage tolerant. This feature allows the use of these devices as translators in mixed voltage environments.