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Technical Specifications

Parameters and characteristics for this part

SpecificationAD4855BBCZ
ArchitectureSAR
ConfigurationADC
Data InterfaceSPI, LVDS
FeaturesSimultaneous Sampling
Input TypeSingle Ended, Differential
Mounting TypeSurface Mount
Number of A/D Converters8 count
Number of Bits16 bits
Number of Inputs8, 16
Operating Temperature (Max)125 °C
Operating Temperature (Min)-40 °C
Package / Case64-LFBGA
Package Length7 mm
Package Name64-BGA
Package Width7 mm
Ratio - ADC8
Ratio - S/H0
Reference TypeExternal, Internal
Sampling Rate (Per Second)250 kHz
Voltage - Supply, Analog (Max)5.25 V
Voltage - Supply, Analog (Min)4.75 V
Voltage - Supply, Digital (Max)5.25 V
Voltage - Supply, Digital (Min)4.75 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$Updated
DigikeyTray 1$ 59.87<3d
10$ 49.41
25$ 46.80
100$ 43.93

CAD

3D models and CAD resources for this part

Description

General part information

AD4855 Series

The AD4855 is a fully buffered, 8-channel simultaneous sampling, 16-bit, 250 kSPS data acquisition system (DAS) with differential, wide common-mode range inputs. Its functional architecture is shown in Figure 1. Operating from a 5 V low voltage supply, flexible input buffer supplies, and using the precision low drift internal reference and reference buffer, the AD4855 allows the SoftSpan range of each channel to be independently configured to match the native application signal swing, minimizing additional external signal conditioning. To further maximize single-conversion dynamic range, the AD4855 incorporates seamless high dynamic range (SHDR) technology. When enabled, the input signal path gain of the channel is automatically optimized on a sample-by-sample basis, minimizing converter noise on each sample without impacting linearity.The 11 MHz bandwidth, picoamp input analog buffers, wide input common-mode range, and 120 dB common-mode rejection ratio (CMRR) of the AD4855 allow the DAS to directly digitize input signals with arbitrary swings on INx+ and INx−. Its input signal flexibility, combined with ±160 μV integral nonlinearity (INL), no missing codes at 16 bits, 94.6 dB signal to noise ratio (SNR), and 98.1 dB dynamic range, make the AD4855 an ideal choice for applications requiring high accuracy, throughput, and precision in a compact solution footprint. Enabling 16-bit oversampling offers further SNR and dynamic range improvements. Optional per channel offset, gain, and phase adjustment provide the ability to calibrate and remove system-level errors upstream to the DAS.The AD4855 features a serial peripheral interface (SPI) register configuration bus (0.9 V to 5.25 V) and supports both low voltage differential signaling buses (LVDS) and complementary metal-oxide semiconductor (CMOS) conversion data output buses, selectable using the LVDS/CMOSpin. Between one and eight lines of data output can be employed in CMOS mode, allowing the user to optimize bus width and throughput.The 7.00 mm × 7.00 mm, 64-ball, ball grid array (BGA) of the AD4855 includes all critical power supply and reference bypass capacitors, minimizing full solution footprint and component count and reducing sensitivity to application printed circuit board (PCB) layout. The device operates over an extended industrial temperature range of −40°C to +125°C.Note that throughout this data sheet, multifunction pins such as LVDS/CMOSare referred to either by the entire pin name or by a single function of the pin. For example, LVDS when only that function is relevant.ApplicationsAutomatic test equipmentAvionics and aerospaceInstrumentation and control systemsSemiconductor manufacturingTest and measurement