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Technical Specifications
Parameters and characteristics for this part
| Specification | HEF40175BTT-Q100J |
|---|---|
| Clock Frequency | 45 MHz |
| Current - Output High, Low [custom] | 3.4 mA |
| Current - Output High, Low [custom] | 3.4 mA |
| Current - Quiescent (Iq) | 4 çA |
| Grade | Automotive |
| Input Capacitance | 7.5 pF |
| Mounting Type | Surface Mount |
| Number of Bits per Element | 4 |
| Number of Elements | 1 |
| Operating Temperature [Max] | 125 °C |
| Operating Temperature [Min] | -40 °C |
| Output Type | Complementary |
| Package / Case | 16-TSSOP |
| Package / Case [y] | 4.4 mm |
| Package / Case [y] | 0.173 in |
| Qualification | AEC-Q100 |
| Supplier Device Package | 16-TSSOP |
| Trigger Type | Positive Edge |
| Type | D-Type |
| Voltage - Supply [Max] | 15 V |
| Voltage - Supply [Min] | 3 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | N/A | 2400 | $ 1.15 | |
Description
General part information
HEF40175BTT-Q100 Series
The HEF40175B-Q100 is a quad positive edge triggered D-type flip-flop with four data (Dn) inputs, common clock (CP) and asynchronous master reset (MR) inputs, and complementary Qn andQn outputs. WhenMRis HIGH data at the D-input that meets the set-up and hold time requirements on the LOW-to-HIGH clock transition will be stored in the flip-flop and appear at the Q output. When LOW,MRresets all flip-flops (Qn = LOW,Qn = HIGH), independent of CP and Dn. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VDD.
Documents
Technical documentation and resources