74HC74BQ-Q100,115
ActiveDUAL D-TYPE FLIP-FLOP WITH SET AND RESET; POSITIVE EDGE-TRIGGER
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74HC74BQ-Q100,115
ActiveDUAL D-TYPE FLIP-FLOP WITH SET AND RESET; POSITIVE EDGE-TRIGGER
Technical Specifications
Parameters and characteristics for this part
| Specification | 74HC74BQ-Q100,115 |
|---|---|
| Clock Frequency [custom] | 82 MHz |
| Current - Output High, Low [custom] | 5.2 mA |
| Current - Output High, Low [custom] | 5.2 mA |
| Function | Set(Preset) and Reset |
| Grade | Automotive |
| Input Capacitance | 3.5 pF |
| Max Propagation Delay @ V, Max CL | 37 ns |
| Mounting Type | Surface Mount |
| Number of Bits per Element | 1 |
| Number of Elements | 2 |
| Operating Temperature [Max] | 125 °C |
| Operating Temperature [Min] | -40 °C |
| Output Type | Complementary |
| Package / Case | 14-VFQFN Exposed Pad |
| Qualification | AEC-Q100 |
| Supplier Device Package | 14-DHVQFN (2.5x3) |
| Trigger Type | Positive Edge |
| Type | D-Type |
| Voltage - Supply [Max] | 6 V |
| Voltage - Supply [Min] | 2 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | N/A | 0 | $ 0.41 | |
Description
General part information
74HC74BQ-Q100 Series
The 74HC74-Q100; 74HCT74-Q100 are dual positive edge triggered D-type flip-flop with individual data (nD), clock (nCP), set (nSD) and reset (nRD) inputs, and complementary nQ and nQoutputs. Data at the nD-input, that meets the set-up and hold time requirements on the LOW-to-HIGH clock transition, will be stored in the flip-flop and appear at the nQ output. The Schmitt-trigger action in the clock input, makes the circuit highly tolerant to slower clock rise and fall times. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.
Documents
Technical documentation and resources