
LTC4221IGN#PBF
ActiveDUAL HOT SWAP CONTROLLER/POWER SEQUENCER WITH DUAL SPEED, DUAL LEVEL FAULT PROTECTION
Deep-Dive with AI
Search across all available documentation for this part.

LTC4221IGN#PBF
ActiveDUAL HOT SWAP CONTROLLER/POWER SEQUENCER WITH DUAL SPEED, DUAL LEVEL FAULT PROTECTION
Deep-Dive with AI
Technical Specifications
Parameters and characteristics for this part
| Specification | LTC4221IGN#PBF |
|---|---|
| Applications | General Purpose |
| Current - Supply | 2.2 mA |
| Features | UVLO, OVP |
| Internal Switch(s) | False |
| Mounting Type | Surface Mount |
| Number of Channels | 2 |
| Operating Temperature [Max] | 85 °C |
| Operating Temperature [Min] | -40 C |
| Package / Case | 16-SSOP |
| Package / Case [x] | 0.154 in |
| Package / Case [y] | 3.9 mm |
| Programmable Features | Circuit Breaker, Current Limit, Auto Retry, Latched Fault, Fault Timeout |
| Supplier Device Package | 16-SSOP |
| Type | Hot Swap Controller |
| Voltage - Supply [Max] | 13.5 V |
| Voltage - Supply [Min] | 1 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | Updated |
|---|---|---|---|---|
| Digikey | N/A | 182 | $ 12.37 | 1m+ |
Description
General part information
LTC4221 Series
The LTC4221 is a 2-channel Hot Swap™controller that allows a board to be safely inserted and removed from a live backplane. Using two independent high side gate drivers to control two external N-channel pass transistors, the output voltages can be ramped up with current foldback to limit the inrush current during the start-up period. No external compensation capacitors are required at the GATE pins. The two channels can be configured to ramp up and down separately or simultaneously for supply voltages ranging from 2.7V to 13.5V and 1V to 13.5V for channels 1 and 2 respectively.Each channel has two current limit comparators that provide dual level and dual speed overcurrent circuit breaker protection after the start-up period. If any current sense voltage exceeds 100mV for 1µs or 25mV for the timeout delay (set by the CFILTERat the FILTER pin), then theFAULTlatch is set and both GATE pins are pulled low.The FB pins monitor the respective channel output voltages and provide the inputs for the PWRGD comparators as well as overvoltage protection.ApplicationsElectronic Circuit BreakerPower Supply SequencingLive Board Insertion and RemovalIndustrial High Side Switch/Circuit Breaker
Documents
Technical documentation and resources