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SOT109-1
Integrated Circuits (ICs)

74HC237D-Q100J

Active
Nexperia USA Inc.

3-TO-8 LINE DECODER / DEMULTIPLEXER, 74HC, 8 OUTPUTS, 2 V TO 6 V, 16 PINS, SOIC

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SOT109-1
Integrated Circuits (ICs)

74HC237D-Q100J

Active
Nexperia USA Inc.

3-TO-8 LINE DECODER / DEMULTIPLEXER, 74HC, 8 OUTPUTS, 2 V TO 6 V, 16 PINS, SOIC

Technical Specifications

Parameters and characteristics for this part

Specification74HC237D-Q100J
Circuit1 x 3:8
Current - Output High, Low [custom]5.2 mA
Current - Output High, Low [custom]5.2 mA
GradeAutomotive
Independent Circuits1
Mounting TypeSurface Mount
Operating Temperature [Max]125 °C
Operating Temperature [Min]-40 C
Package / Case16-SOIC
Package / Case0.154 in, 3.9 mm
QualificationAEC-Q100
Supplier Device Package16-SO
TypeDecoder/Demultiplexer
Voltage - Supply [Max]6 V
Voltage - Supply [Min]2 V
Voltage Supply SourceSingle Supply

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyN/A 2481$ 0.91

Description

General part information

74HC237D-Q100 Series

The 74HC237-Q100 is a 3-to-8 line decoder, demultiplexer with latches at the three address inputs (An). The 74HC237-Q100 essentially combines the 3-to-8 decoder function with a 3-bit storage latch. When the latch is enabled (LE= LOW), the 74HC237-Q100 acts as a 3-to-8 active LOW decoder. When the latch enable (LE) goes from LOW-to-HIGH, the last data present at the inputs before this transition, is stored in the latches. Further address changes are ignored as long asLEremains HIGH. The output enable input (E1 and E2) controls the state of the outputs independent of the address inputs or latch operation. All outputs are HIGH unlessE1 is LOW and E2 is HIGH. The 74HC237-Q100 is ideally suited for implementing non-overlapping decoders in 3-state systems and strobes (stored address) applications in bus-oriented systems.