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8-TSSOP, 8-MSOP
Integrated Circuits (ICs)

SN74LVC3G17DCURG4

Unknown
Texas Instruments

3-CH, 1.65-V TO 5.5-V BUFFERS WITH SCHMITT-TRIGGER INPUTS

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8-TSSOP, 8-MSOP
Integrated Circuits (ICs)

SN74LVC3G17DCURG4

Unknown
Texas Instruments

3-CH, 1.65-V TO 5.5-V BUFFERS WITH SCHMITT-TRIGGER INPUTS

Technical Specifications

Parameters and characteristics for this part

SpecificationSN74LVC3G17DCURG4
Current - Output High, Low [x]32 mA
Current - Output High, Low [y]32 mA
Input TypeSchmitt Trigger
Logic TypeBuffer, Non-Inverting
Mounting TypeSurface Mount
Number of Bits per Element1
Operating Temperature [Max]125 °C
Operating Temperature [Min]-40 °C
Output TypePush-Pull
Package / Case8-VFSOP
Package / Case [y]2.3 mm
Package / Case [y]0.091 in
Voltage - Supply [Max]5.5 V
Voltage - Supply [Min]1.65 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyCut Tape (CT) 1$ 0.93
Digi-Reel® 1$ 0.93
Tape & Reel (TR) 3000$ 0.36
6000$ 0.33
15000$ 0.32
30000$ 0.31
Texas InstrumentsLARGE T&R 1$ 0.60
100$ 0.47
250$ 0.34
1000$ 0.24

Description

General part information

SN74LVC3G17 Series

This triple Schmitt-trigger buffer is designed for 1.65-V to 5.5-V VCCoperation.

The SN74LVC3G17 device contains three buffers and performs the Boolean function Y = A. The device functions as three independent buffers but, because of Schmitt action, it may have different input threshold levels for positive-going (VT+) and negative-going (VT) signals.

This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

Documents

Technical documentation and resources

Digital Logic Data Book

Related Document

Signal Switch Data Book

Related Document

Logic Guide

Datasheet

Use of the CMOS Unbuffered Inverter in Oscillator Circuits

Application note

STANDARD LINEAR AND LOGIC FOR DVD/VCD PLAYERS

More literature

Low-Voltage Logic (LVC) Designer's Guide

Design guide

16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)

Application note

Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices

Application note

Input and Output Characteristics of Digital Integrated Circuits

Application note

Understanding Advanced Bus-Interface Products Design Guide

Application note

LVC and LV Low-Voltage CMOS Logic Data Book (Rev. B)

User guide

SN74LVC3G17 Triple Schmitt-Trigger Buffer datasheet (Rev. F)

Data sheet

LVC Characterization Information

Application note

Semiconductor Packing Material Electrostatic Discharge (ESD) Protection

Application note

CMOS Power Consumption and CPD Calculation (Rev. B)

Application note

Implications of Slow or Floating CMOS Inputs (Rev. E)

Application note

How to Select Little Logic (Rev. A)

Application note

Live Insertion

Application note

Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices

Application note

TI IBIS File Creation, Validation, and Distribution Processes

Application note

Standard Linear & Logic for PCs, Servers & Motherboards

More literature

Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)

Application note

Design Summary for WCSP Little Logic (Rev. B)

Product overview

Texas Instruments Little Logic Application Report

Application note

Selecting the Right Level Translation Solution (Rev. A)

Application note

Understanding Schmitt Triggers (Rev. B)

Application brief

Little Logic Guide 2018 (Rev. G)

Selection guide

Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)

Application note