74HC74PW,118
ActiveDUAL D-TYPE FLIP-FLOP WITH SET AND RESET; POSITIVE EDGE-TRIGGER
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74HC74PW,118
ActiveDUAL D-TYPE FLIP-FLOP WITH SET AND RESET; POSITIVE EDGE-TRIGGER
Technical Specifications
Parameters and characteristics for this part
| Specification | 74HC74PW,118 |
|---|---|
| Clock Frequency [custom] | 82 MHz |
| Current - Output High, Low [custom] | 5.2 mA |
| Current - Output High, Low [custom] | 5.2 mA |
| Function | Set(Preset) and Reset |
| Input Capacitance | 3.5 pF |
| Max Propagation Delay @ V, Max CL | 37 ns |
| Mounting Type | Surface Mount |
| Number of Bits per Element | 1 |
| Number of Elements | 2 |
| Operating Temperature [Max] | 125 °C |
| Operating Temperature [Min] | -40 °C |
| Output Type | Complementary |
| Package / Case | 14-TSSOP |
| Package / Case [x] | 0.173 ", 4.4 mm |
| Supplier Device Package | 14-TSSOP |
| Trigger Type | Positive Edge |
| Type | D-Type |
| Voltage - Supply [Max] | 6 V |
| Voltage - Supply [Min] | 2 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | N/A | 127 | $ 0.33 | |
Description
General part information
74HC74PW Series
The 74HC74 and 74HCT74 are dual positive edge triggered D-type flip-flop. They have individual data (nD), clock (nCP), set (nSD) and reset (nRD) inputs, and complementary nQ and nQoutputs. Data at the nD-input, that meets the set-up and hold time requirements on the LOW-to-HIGH clock transition, is stored in the flip-flop and appears at the nQ output. Schmitt-trigger action in the clock input, makes the circuit highly tolerant to slower clock rise and fall times. Inputs include clamp diodes that enable the use of current limiting resistors to interface inputs to voltages in excess of VCC.
Documents
Technical documentation and resources