Specification	SN74ABT162601DGGR

Current - Output High, Low	32 mA, 64 mA, 12 mA
Mounting Type	Surface Mount
Number of Circuits	18 Bit
Operating Temperature [Max]	85 °C
Operating Temperature [Min]	-40 °C
Package / Case	6.1 mm
Package / Case	0.24 in
Package / Case	56-TFSOP
Supplier Device Package	56-TSSOP
Voltage - Supply [Max]	5.5 V
Voltage - Supply [Min]	4.5 V

SN74ABT162601 Series

18-bit universal bus transceivers with 3-state outputs

Part	Mounting Type	Package / Case	Package / Case	Package / Case	Voltage - Supply [Min]	Voltage - Supply [Max]	Number of Circuits	Operating Temperature [Max]	Operating Temperature [Min]	Supplier Device Package	Current - Output High, Low
Texas Instruments SN74ABT162601DL	Surface Mount	0.295 in	56-BSSOP	7.5 mm	4.5 V	5.5 V	18 Bit	85 °C	-40 °C	56-SSOP	12 mA 32 mA 64 mA
Texas Instruments SN74ABT162601DGGR	Surface Mount	0.24 in	56-TFSOP	6.1 mm	4.5 V	5.5 V	18 Bit	85 °C	-40 °C	56-TSSOP	12 mA 32 mA 64 mA
Texas Instruments SN74ABT162601DLR	Surface Mount	0.295 in	56-BSSOP	7.5 mm	4.5 V	5.5 V	18 Bit	85 °C	-40 °C	56-SSOP	12 mA 32 mA 64 mA

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Digikey	Cut Tape (CT)	1	$ 6.55
	Digi-Reel®	1	$ 6.55
	Tape & Reel (TR)	2000	$ 3.29
Texas Instruments	LARGE T&R	1	$ 4.51
		100	$ 3.67
		250	$ 2.89
		1000	$ 2.45

Description

General part information

SN74ABT162601 Series

These 18-bit universal bus transceivers combine D-type latches and D-type flip-flops to allow data flow in transparent, latched, and clocked modes.

Data flow in each direction is controlled by output-enable (OEAB\ and OEBA\), latch-enable (LEAB and LEBA), and clock (CLKAB and CLKBA) inputs. The clock can be controlled by the clock-enable (CLKENAB\ and CLKENBA\) inputs.

For A-to-B data flow, the device operates in the transparent mode when LEAB is high. When LEAB is low, the A data is latched if CLKAB is held at a high or low logic level. If LEAB is low, the A data is stored in the latch/flip-flop on the low-to-high transition of CLKAB. Output-enable OEAB\ is active-low. When OEAB\ is low, the outputs are active. When OEAB\ is high, the outputs are in the high-impedance state. Data flow for B to A is similar to that of A to B but uses OEBA\, LEBA, CLKBA, and CLKENBA\.

Documents

Technical documentation and resources

SN74ABT162601DGGR

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SN74ABT162601DGGR

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Technical Specifications

SN74ABT162601 Series

Pricing

Description

SN74ABT162601 Series

Documents

Semiconductor Packing Material Electrostatic Discharge (ESD) Protection

Designing With Logic (Rev. C)

Advanced BiCMOS Technology (ABT) Logic Characterization Information (Rev. B)

Advanced BiCMOS Technology (ABT) Logic Enables Optimal System Design (Rev. A)

18-Bit Universal Bus Transceivers With 3-State Outputs datasheet (Rev. G)

Input and Output Characteristics of Digital Integrated Circuits

Quad Flatpack No-Lead Logic Packages (Rev. D)

Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)

Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)

LOGIC Pocket Data Book (Rev. B)

Understanding Advanced Bus-Interface Products Design Guide

Logic Guide (Rev. AB)

Advanced Bus Interface Logic Selection Guide

TI IBIS File Creation, Validation, and Distribution Processes

Implications of Slow or Floating CMOS Inputs (Rev. E)

Live Insertion

Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices

Family of Curves Demonstrating Output Skews for Advanced BiCMOS Devices (Rev. A)

Selecting the Right Level Translation Solution (Rev. A)

SN74ABT162601 Series