Specification	DS99R103TVS/NOPB

Data Rate	960 Mbps
Function	Serializer
Input Type	LVCMOS
Mounting Type	Surface Mount
Number of Inputs	24
Number of Outputs	1
Operating Temperature [Max]	85 °C
Operating Temperature [Min]	-40 °C
Output Type	LVDS, FPD-Link
Package / Case	48-TQFP
Supplier Device Package	48-TQFP (7x7)
Voltage - Supply [Max]	3.6 V
Voltage - Supply [Min]	3 V

DS99R103 Series

Part	Output Type	Number of Outputs	Input Type	Package / Case	Mounting Type	Voltage - Supply [Max]	Voltage - Supply [Min]	Function	Operating Temperature [Max]	Operating Temperature [Min]	Data Rate	Supplier Device Package	Number of Inputs
Texas Instruments DS99R103TVS/NOPB	FPD-Link LVDS	1	LVCMOS	48-TQFP	Surface Mount	3.6 V	3 V	Serializer	85 °C	-40 °C	960 Mbps	48-TQFP (7x7)	24
Texas Instruments DS99R103TVSX/NOPB	FPD-Link LVDS	1	LVCMOS	48-TQFP	Surface Mount	3.6 V	3 V	Serializer	85 °C	-40 °C	960 Mbps	48-TQFP (7x7)	24
Texas Instruments DS99R103TSQ/NOPB	FPD-Link LVDS	1	LVCMOS	48-WFQFN Exposed Pad	Surface Mount	3.6 V	3 V	Serializer	85 °C	-40 °C	960 Mbps	48-WQFN (7x7)	24

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Digikey	Tray	1	$ 10.13
		10	$ 9.15
		25	$ 8.73
		80	$ 7.58
		250	$ 7.24
		500	$ 6.60
		1000	$ 5.75
Texas Instruments	JEDEC TRAY (10+1)	1	$ 8.86
		100	$ 7.22
		250	$ 5.68
		1000	$ 4.82

Description

General part information

DS99R103 Series

The DS99R103/DS99R104 Chipset translates a 24-bit parallel bus into a fully transparent data/control LVDS serial stream with embedded clock information. This single serial stream simplifies transferring a 24-bit bus over PCB traces and cable by eliminating the skew problems between parallel data and clock paths. It saves system cost by narrowing data paths that in turn reduce PCB layers, cable width, and connector size and pins.

The DS99R103/DS99R104 incorporates LVDS signaling on the high-speed I/O. LVDS provides a low power and low noise environment for reliably transferring data over a serial transmission path. By optimizing the serializer output edge rate for the operating frequency range EMI is further reduced.

In addition the device features pre-emphasis to boost signals over longer distances using lossy cables. Internal DC balanced encoding/decoding is used to support AC-Coupled interconnects.

Documents

Technical documentation and resources

DS99R103/DS99R104 3-40MHz DC-Balanced 24-Bit LVDS Serializer and Deserializer datasheet (Rev. D)

Data sheet