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SN74HCS237DR

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Texas Instruments

HIGH SPEED CMOS LOGIC 3-TO-8 LINE DECODER DEMULTIPLEXER WITH ADDRESS LATCHES

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SOIC (D)
Integrated Circuits (ICs)

SN74HCS237DR

Active
Texas Instruments

HIGH SPEED CMOS LOGIC 3-TO-8 LINE DECODER DEMULTIPLEXER WITH ADDRESS LATCHES

Technical Specifications

Parameters and characteristics for this part

SpecificationSN74HCS237DR
Circuit1 x 3:8
Current - Output High, Low [custom]7.8 mA
Current - Output High, Low [custom]7.8 mA
Independent Circuits1
Mounting TypeSurface Mount
Operating Temperature [Max]125 °C
Operating Temperature [Min]-40 °C
Package / Case16-SOIC
Package / Case [x]0.154 in
Package / Case [y]3.9 mm
Supplier Device Package16-SOIC
TypeDecoder/Demultiplexer
Voltage - Supply [Max]6 V
Voltage - Supply [Min]2 V
Voltage Supply SourceSingle Supply

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyCut Tape (CT) 1$ 0.41
10$ 0.35
25$ 0.33
100$ 0.26
250$ 0.24
500$ 0.20
1000$ 0.16
Digi-Reel® 1$ 0.41
10$ 0.35
25$ 0.33
100$ 0.26
250$ 0.24
500$ 0.20
1000$ 0.16
Tape & Reel (TR) 2500$ 0.12
Texas InstrumentsLARGE T&R 1$ 0.29
100$ 0.20
250$ 0.15
1000$ 0.10

Description

General part information

SN74HCS237-Q1 Series

The SN74HCS237-Q1 is a three to eight decoder with latched address inputs, one standard output strobe (G0), and one active low output strobe (G1). When the latch enable (LE) input is low, the device acts as a standard three to eight decoder. When the latch enable (LE) input is high, the address latch retains its previous state. When the outputs are gated by either strobe input, they are all forced into the low state. When the outputs are not disabled by one or both of the strobe inputs, only the selected output is high while all others are low.

The SN74HCS237-Q1 is a three to eight decoder with latched address inputs, one standard output strobe (G0), and one active low output strobe (G1). When the latch enable (LE) input is low, the device acts as a standard three to eight decoder. When the latch enable (LE) input is high, the address latch retains its previous state. When the outputs are gated by either strobe input, they are all forced into the low state. When the outputs are not disabled by one or both of the strobe inputs, only the selected output is high while all others are low.