CD40193BE
ActiveCMOS PRESETTABLE BINARY UP/DOWN COUNTER (DUAL CLOCK WITH RESET)
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CD40193BE
ActiveCMOS PRESETTABLE BINARY UP/DOWN COUNTER (DUAL CLOCK WITH RESET)
Technical Specifications
Parameters and characteristics for this part
| Specification | CD40193BE |
|---|---|
| Count Rate | 5.5 MHz |
| Direction | Up, Down |
| Logic Type | Binary Counter |
| Mounting Type | Through Hole |
| Number of Bits per Element | 4 |
| Number of Elements | 1 |
| Operating Temperature [Max] | 125 °C |
| Operating Temperature [Min] | -55 °C |
| Package / Case | 0.3 in |
| Package / Case | 16-DIP |
| Package / Case | 7.62 mm |
| Reset | Asynchronous |
| Supplier Device Package | 16-PDIP |
| Timing | Synchronous |
| Trigger Type | Positive Edge |
| Voltage - Supply [Max] | 18 V |
| Voltage - Supply [Min] | 3 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Tube | 1 | $ 0.74 | |
| 10 | $ 0.66 | |||
| 25 | $ 0.63 | |||
| 100 | $ 0.52 | |||
| 250 | $ 0.48 | |||
| 500 | $ 0.43 | |||
| 656 | $ 0.46 | |||
| 1000 | $ 0.40 | |||
| Texas Instruments | TUBE | 1 | $ 0.90 | |
| 100 | $ 0.69 | |||
| 250 | $ 0.51 | |||
| 1000 | $ 0.36 | |||
Description
General part information
CD40193B Series
CD40192b Presettable BCD Up/Down Counter and the CD40193B Presettable Binary Up/Down Counter each consist of 4 synchronously clocked, gated "D" type flip-flops connected as a counter. The inputs consist of 4 individual jam lines, a PRESET\ ENABLE\ control, individual CLOCK UP and CLOCK DOWN signals and a master RESET. Four buffered Q signal outputs as well as CARRY\ and BORROW\ outputs for multiple-stage counting schemes are provided.
The counter is cleared so that all outputs are in a low state by a high on the RESET line. A RESET is accomplished asynchronously with the clock. Each output is individually programmable asynchronously with the clock to the level on the corresponding jam input when the PRESET\ ENABLE\ control is low.
The counter counts up one count on the positive clock edge of the CLOCK UP signal provided the CLOCK DOWN line is high. The counter counts down on count on the positive clock edge of the CLOCK DOWN signal provided the CLOCK UP line is high.
Documents
Technical documentation and resources
