
Integrated Circuits (ICs)
MCIMX507CVM8B
ActiveFreescale Semiconductor - NXP
I.MX50 32-BIT MPU, ARM CORTEX-A8 CORE, 800MHZ, MAPBGA 400/ TRAY ROHS COMPLIANT: YES
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Integrated Circuits (ICs)
MCIMX507CVM8B
ActiveFreescale Semiconductor - NXP
I.MX50 32-BIT MPU, ARM CORTEX-A8 CORE, 800MHZ, MAPBGA 400/ TRAY ROHS COMPLIANT: YES
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Technical Specifications
Parameters and characteristics for this part
| Specification | MCIMX507CVM8B |
|---|---|
| Additional Interfaces | I2C, 1-Wire, MMC/SD, SSI, AC'97, UART, SPI, I2S |
| Co-Processors/DSP | NEON™ SIMD, Multimedia |
| Core Processor | ARM® Cortex®-A8 |
| Display & Interface Controllers | LCD |
| Ethernet | 1 |
| Ethernet [Max] | 100 Mbps |
| Ethernet [Min] | 10 Mbps |
| Graphics Acceleration | True |
| Mounting Type | Surface Mount |
| Number of Cores/Bus Width | 32 Bit, 1 Core |
| Operating Temperature [Max] | 70 °C |
| Operating Temperature [Min] | 0 °C |
| Package / Case | 400-LFBGA |
| RAM Controllers | LPDDR, DDR2, LPDDR2 |
| Security Features | Cryptography, Secure JTAG, Boot Security |
| Speed | 800 MHz |
| Supplier Device Package | 400-LFBGA (17x17) |
| USB | USB 2.0 + PHY (2) |
| Voltage - I/O | 3 V, 2.775 V, 1.875 V, 1.2 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
Description
General part information
MCIMX507 Series
MMU, L1 instruction cache, and L1 data cache
Unified L2 cache
800 MHz or 1 GHz target frequency of the core (including NEON, VFPv3, and L1 cache)
Documents
Technical documentation and resources