74HC280D,653
ActivePARITY GENERATOR / CHECKER, 74HC280, 1 CHANNEL, 2 V TO 6 V, 14 PINS, SOIC
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74HC280D,653
ActivePARITY GENERATOR / CHECKER, 74HC280, 1 CHANNEL, 2 V TO 6 V, 14 PINS, SOIC
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Technical Specifications
Parameters and characteristics for this part
| Specification | 74HC280D,653 |
|---|---|
| Logic Type | Parity Generator/Checker |
| Mounting Type | Surface Mount |
| Number of Circuits | 9-Bit |
| Package / Case | 3.9 mm, 0.154 in |
| Package / Case | 14-SOIC |
| Supplier Device Package | 14-SO |
| Voltage - Supply [Max] | 6 V |
| Voltage - Supply [Min] | 2 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | N/A | 2218 | $ 0.87 | |
Description
General part information
74HC280D Series
The 74HC280; 74HCT280 is a 9-bit parity generator or checker. Both even and odd parity outputs are available. The even parity output (PE) is HIGH when an even number of data inputs (I0 to I8) is HIGH. The odd parity output (PO) is HIGH when an odd number of data inputs are HIGH. Expansion to larger word sizes is accomplished by tying the even outputs (PE) of up to nine parallel devices to the final stage data inputs. Inputs include clamp diodes. It enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.
Documents
Technical documentation and resources