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Technical Specifications
Parameters and characteristics for this part
| Specification | MC10EP32DR2 |
|---|---|
| Count Rate | 4 GHz |
| Logic Type | Divide-by-2 |
| Mounting Type | Surface Mount |
| Number of Bits per Element | 1 |
| Number of Elements | 1 |
| Operating Temperature [Max] | 85 °C |
| Operating Temperature [Min] | -40 °C |
| Package / Case | 8-SOIC |
| Package / Case [x] | 0.154 in |
| Package / Case [y] | 3.9 mm |
| Reset | Asynchronous |
| Supplier Device Package | 8-SOIC |
| Trigger Type | Negative, Positive |
| Voltage - Supply [Max] | 5.5 V |
| Voltage - Supply [Min] | 3 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Bulk | 110 | $ 2.74 | |
Description
General part information
MC10EP32 Series
The MC10/100EP32 is an integrated divide by 2 divider with differential CLK inputs.The VBBpin, an internally generated voltage supply, is available to this device only. For single-ended input conditions, the unused differential input is connected to VBBas a switching reference voltage. VBBmay also rebias AC coupled inputs. When used, decouple VBBand VCCvia a 0.01μF capacitor and limit current sourcing or sinking to 0.5mA. When not used, VBBshould be left open.The reset pin is asynchronous and is asserted on the rising edge. Upon power-up, the internal flip-flops will attain a random state; the reset allows for the synchronization of multiple EP32's in a system.The 100 Series contains temperature compensation.
Documents
Technical documentation and resources