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Technical Specifications
Parameters and characteristics for this part
| Specification | SN74AUC00RGYRG4 |
|---|---|
| Current - Output High, Low [custom] | 9 mA |
| Current - Output High, Low [custom] | 9 mA |
| Current - Quiescent (Max) [Max] | 10 µA |
| Input Logic Level - High [custom] | 1.7 V |
| Input Logic Level - Low [Max] | 0.7 V |
| Input Logic Level - Low [Min] | 0 V |
| Logic Type | NAND Gate |
| Max Propagation Delay @ V, Max CL | 2 ns |
| Mounting Type | Surface Mount |
| Number of Circuits | 4 |
| Number of Inputs | 2 |
| Operating Temperature [Max] | 85 °C |
| Operating Temperature [Min] | -40 °C |
| Package / Case | 14-VFQFN Exposed Pad |
| Supplier Device Package | 14-VQFN (3.5x3.5) |
| Voltage - Supply [Max] | 2.7 V |
| Voltage - Supply [Min] | 0.8 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Tape & Reel (TR) | 3000 | $ 0.22 | |
| 6000 | $ 0.21 | |||
| 15000 | $ 0.19 | |||
| 30000 | $ 0.18 | |||
Description
General part information
SN74AUC00 Series
This quadruple 2-input positive-NAND gate is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to 1.95-V VCCoperation.
The SN74AUC00 devices perform the Boolean function Y =A • Bor Y =A+Bin positive logic.
This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
Documents
Technical documentation and resources