
TLC5618AQDG4
Unknown12-BIT, 2.5 US DUAL DAC, SERIAL INPUT, PGRMABLE SETTLING TIME, SIMULTANEOUS UPDATE, LOW POWER
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TLC5618AQDG4
Unknown12-BIT, 2.5 US DUAL DAC, SERIAL INPUT, PGRMABLE SETTLING TIME, SIMULTANEOUS UPDATE, LOW POWER
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Technical Specifications
Parameters and characteristics for this part
| Specification | TLC5618AQDG4 |
|---|---|
| Architecture | String DAC |
| Data Interface | SPI |
| Differential Output | False |
| INL/DNL (LSB) | 0.5 LSB, 4 LSB |
| Mounting Type | Surface Mount |
| Number of Bits | 12 bits |
| Operating Temperature [Max] | 125 °C |
| Operating Temperature [Min] | -40 °C |
| Output Type | Voltage - Buffered |
| Package / Case | 8-SOIC |
| Package / Case [x] | 0.154 in |
| Package / Case [y] | 3.9 mm |
| Reference Type | External |
| Settling Time | 12.5 µs |
| Supplier Device Package | 8-SOIC |
| Voltage - Supply, Analog | 5 V |
| Voltage - Supply, Digital | 5 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Tube | 75 | $ 9.57 | |
| Texas Instruments | TUBE | 1 | $ 12.25 | |
| 100 | $ 9.99 | |||
| 250 | $ 7.85 | |||
| 1000 | $ 6.66 | |||
Description
General part information
TLC5618A Series
The TLC5618 is a dual 12-bit voltage output digital-to-analog converter (DAC) with buffered reference inputs (high impedance). The DACs have an output voltage range that is two times the reference voltage, and the DACs are monotonic. The device is simple to use, running from a single supply of 5 V. A power-on reset function is incorporated in the device to ensure repeatable start-up conditions.
Digital control of the TLC5618 is over a 3-wire CMOS-compatible serial bus. The device receives a 16-bit word for programming and producing the analog output. The digital inputs feature Schmitt triggers for high noise immunity. Digital communication protocols include the SPI™, QSPI™, and Microwire™ standards.
Two versions of the device are available. The TLC5618 does not have an internal state machine and is dependent on all external timing signals. The TLC5618A has an internal state machine that counts the number of clocks from the falling edge of CS\ and then updates and disables the device from accepting further data inputs. The TLC5618A is recommended for TMS320 and SPI processors, and the TLC5618 is recommended only for SPI or 3-wire serial port processors. The TLC5618A is backward-compatible and designed to work in TLC5618 designed systems.
Documents
Technical documentation and resources